[RFC PATCH 0/3] arm64: errata: Disable FWB on parts with non-ARM interconnects
Oliver Upton
oliver.upton at linux.dev
Fri Feb 24 11:00:19 PST 2023
James,
I realize I didn't send my reply earlier this week and came back to this
when looking for your reply on another thread.
Sorry about that.
On Tue, Feb 21, 2023 at 05:41:35PM +0000, James Morse wrote:
[...]
> > Wait, what? Is there a legitimate concern that affected systems are in
> > the wild today, or is there enough time for affected platforms to go and
> > implement the necessary firmware interface?
>
> The one platform that arm is aware of isn't shipping yet - I assume it will implement the
> firmware interface.
>
> But I don't think arm always know what it is people are building ... it certainly doesn't
> reach me. This affects a whole host of CPUs, I wouldn't be surprised if there is an
> existing part out there that is affected.
I was only thinking of the V2 system that is unobtainable at this point.
Actually looking at the laundry list of affected cores it does make more
sense that this problem already exists today.
> > I'm rather troubled by the idea of enabling this by default on systems
> > that use these cores unless there really is no opportunity to
> > course-correct.
>
> It's the choice between correctness and performance. Probability says unless the CPU is
> Neoverse-V2 (which is that one platform), you're not affected. But how much does
> correctness matter? I'd hate to have to debug "1 in a 100 times the guest doesn't boot".
Oh, not looking to make that tradeoff with my line of questioning :) I
was more curious if there was still an opportunity for affected systems
to explicitly opt-in to the mitigation. Seems that the answer is "no",
sadly.
--
Thanks,
Oliver
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