[PATCH 3/3] perf vendor events arm64: Use event name instead of event code
James Clark
james.clark at arm.com
Fri Oct 21 02:09:59 PDT 2022
On 21/10/2022 09:53, Shang XiaoJing wrote:
> Use the event name instead of the corresponding event code for more
> clear, which makes the result of perf more readable.
>
> Signed-off-by: Shang XiaoJing <shangxiaojing at huawei.com>
> ---
> .../arch/arm64/hisilicon/hip08/metrics.json | 50 +++++++++----------
> 1 file changed, 25 insertions(+), 25 deletions(-)
>
> diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/metrics.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/metrics.json
> index 6443a061e22a..4629349005d0 100644
> --- a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/metrics.json
> +++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/metrics.json
> @@ -28,7 +28,7 @@
> "MetricName": "backend_bound"
> },
> {
> - "MetricExpr": "armv8_pmuv3_0 at event\\=0x201d@ / CPU_CYCLES",
> + "MetricExpr": "FETCH_BUBBLE_EXCEEDMIW / CPU_CYCLES",
> "PublicDescription": "Fetch latency bound L2 topdown metric",
> "BriefDescription": "Fetch latency bound L2 topdown metric",
> "MetricGroup": "TopDownL2",
> @@ -42,7 +42,7 @@
> "MetricName": "fetch_bandwidth_bound"
> },
> {
> - "MetricExpr": "(bad_speculation * BR_MIS_PRED) / (BR_MIS_PRED + armv8_pmuv3_0 at event\\=0x2013@)",
> + "MetricExpr": "(bad_speculation * BR_MIS_PRED) / (BR_MIS_PRED + OOO_FLUSH)",
> "PublicDescription": "Branch mispredicts L2 topdown metric",
> "BriefDescription": "Branch mispredicts L2 topdown metric",
> "MetricGroup": "TopDownL2",
> @@ -56,14 +56,14 @@
> "MetricName": "machine_clears"
> },
> {
> - "MetricExpr": "(EXE_STALL_CYCLE - (MEM_STALL_ANYLOAD + armv8_pmuv3_0 at event\\=0x7005@)) / CPU_CYCLES",
> + "MetricExpr": "(EXE_STALL_CYCLE - (MEM_STALL_ANYLOAD + MEM_STALL_ANYSTORE)) / CPU_CYCLES",
> "PublicDescription": "Core bound L2 topdown metric",
> "BriefDescription": "Core bound L2 topdown metric",
> "MetricGroup": "TopDownL2",
> "MetricName": "core_bound"
> },
> {
> - "MetricExpr": "(MEM_STALL_ANYLOAD + armv8_pmuv3_0 at event\\=0x7005@) / CPU_CYCLES",
> + "MetricExpr": "(MEM_STALL_ANYLOAD + MEM_STALL_ANYSTORE) / CPU_CYCLES",
> "PublicDescription": "Memory bound L2 topdown metric",
> "BriefDescription": "Memory bound L2 topdown metric",
> "MetricGroup": "TopDownL2",
> @@ -91,53 +91,53 @@
> "MetricName": "bp_misp_flush"
> },
> {
> - "MetricExpr": "(armv8_pmuv3_0 at event\\=0x2013@ * 5) / CPU_CYCLES",
> + "MetricExpr": "(OOO_FLUSH * 5) / CPU_CYCLES",
> "PublicDescription": "OOO flush L3 topdown metric",
> "BriefDescription": "OOO flush L3 topdown metric",
> "MetricGroup": "TopDownL3",
> - "MetricName": "ooo_flush"
> + "MetricName": "ooo_flush_ratio"
> },
> {
> - "MetricExpr": "(armv8_pmuv3_0 at event\\=0x1001@ * 5) / CPU_CYCLES",
> + "MetricExpr": "(IF_BP_PRED_BR_SP * 5) / CPU_CYCLES",
> "PublicDescription": "Static predictor flush L3 topdown metric",
> "BriefDescription": "Static predictor flush L3 topdown metric",
> "MetricGroup": "TopDownL3",
> "MetricName": "sp_flush"
> },
> {
> - "MetricExpr": "armv8_pmuv3_0 at event\\=0x1010@ / BR_MIS_PRED",
> + "MetricExpr": "IF_BP_MISP_BR_IND / BR_MIS_PRED",
> "PublicDescription": "Indirect branch L3 topdown metric",
> "BriefDescription": "Indirect branch L3 topdown metric",
> "MetricGroup": "TopDownL3",
> "MetricName": "indirect_branch"
> },
> {
> - "MetricExpr": "(armv8_pmuv3_0 at event\\=0x1013@ + armv8_pmuv3_0 at event\\=0x1016@) / BR_MIS_PRED",
> + "MetricExpr": "(IF_BP_MISP_BR_BLR + IF_BP_MISP_BR_BL) / BR_MIS_PRED",
> "PublicDescription": "Push branch L3 topdown metric",
> "BriefDescription": "Push branch L3 topdown metric",
> "MetricGroup": "TopDownL3",
> "MetricName": "push_branch"
> },
> {
> - "MetricExpr": "armv8_pmuv3_0 at event\\=0x100d@ / BR_MIS_PRED",
> + "MetricExpr": "IF_BP_MISP_BR_RET / BR_MIS_PRED",
> "PublicDescription": "Pop branch L3 topdown metric",
> "BriefDescription": "Pop branch L3 topdown metric",
> "MetricGroup": "TopDownL3",
> "MetricName": "pop_branch"
> },
> {
> - "MetricExpr": "(BR_MIS_PRED - armv8_pmuv3_0 at event\\=0x1010@ - armv8_pmuv3_0 at event\\=0x1013@ - armv8_pmuv3_0 at event\\=0x1016@ - armv8_pmuv3_0 at event\\=0x100d@) / BR_MIS_PRED",
> + "MetricExpr": "(BR_MIS_PRED - IF_BP_MISP_BR_IND - IF_BP_MISP_BR_BLR - IF_BP_MISP_BR_BL - IF_BP_MISP_BR_RET) / BR_MIS_PRED",
> "PublicDescription": "Other branch L3 topdown metric",
> "BriefDescription": "Other branch L3 topdown metric",
> "MetricGroup": "TopDownL3",
> "MetricName": "other_branch"
> },
> {
> - "MetricExpr": "armv8_pmuv3_0 at event\\=0x2012@ / armv8_pmuv3_0 at event\\=0x2013@",
> + "MetricExpr": "NUKE_FLUSH / OOO_FLUSH",
> "PublicDescription": "Nuke flush L3 topdown metric",
> "BriefDescription": "Nuke flush L3 topdown metric",
> "MetricGroup": "TopDownL3",
> - "MetricName": "nuke_flush"
> + "MetricName": "nuke_flush_ratio"
> },
> {
> "MetricExpr": "1 - nuke_flush",
> @@ -147,53 +147,53 @@
> "MetricName": "other_flush"
> },
> {
> - "MetricExpr": "armv8_pmuv3_0 at event\\=0x2010@ / CPU_CYCLES",
> + "MetricExpr": "SYNC_STALL / CPU_CYCLES",
> "PublicDescription": "Sync stall L3 topdown metric",
> "BriefDescription": "Sync stall L3 topdown metric",
> "MetricGroup": "TopDownL3",
> - "MetricName": "sync_stall"
> + "MetricName": "sync_stall_ratio"
> },
> {
> - "MetricExpr": "armv8_pmuv3_0 at event\\=0x2004@ / CPU_CYCLES",
> + "MetricExpr": "ROB_STALL / CPU_CYCLES",
> "PublicDescription": "Rob stall L3 topdown metric",
> "BriefDescription": "Rob stall L3 topdown metric",
> "MetricGroup": "TopDownL3",
> - "MetricName": "rob_stall"
> + "MetricName": "rob_stall_ratio"
> },
> {
> - "MetricExpr": "(armv8_pmuv3_0 at event\\=0x2006@ + armv8_pmuv3_0 at event\\=0x2007@ + armv8_pmuv3_0 at event\\=0x2008@) / CPU_CYCLES",
> + "MetricExpr": "(INT_PTAG_STALL + CC_PTAG_STALL + VFP_PTAG_STALL) / CPU_CYCLES",
> "PublicDescription": "Ptag stall L3 topdown metric",
> "BriefDescription": "Ptag stall L3 topdown metric",
> "MetricGroup": "TopDownL3",
> "MetricName": "ptag_stall"
> },
> {
> - "MetricExpr": "armv8_pmuv3_0 at event\\=0x201e@ / CPU_CYCLES",
> + "MetricExpr": "SAVEOP_QUEUE_STALL / CPU_CYCLES",
> "PublicDescription": "SaveOpQ stall L3 topdown metric",
> "BriefDescription": "SaveOpQ stall L3 topdown metric",
> "MetricGroup": "TopDownL3",
> "MetricName": "saveopq_stall"
> },
> {
> - "MetricExpr": "armv8_pmuv3_0 at event\\=0x2005@ / CPU_CYCLES",
> + "MetricExpr": "PCBUF_STALL / CPU_CYCLES",
> "PublicDescription": "PC buffer stall L3 topdown metric",
> "BriefDescription": "PC buffer stall L3 topdown metric",
> "MetricGroup": "TopDownL3",
> "MetricName": "pc_buffer_stall"
> },
> {
> - "MetricExpr": "armv8_pmuv3_0 at event\\=0x7002@ / CPU_CYCLES",
> + "MetricExpr": "EXE_STALL_DIV / CPU_CYCLES",
> "PublicDescription": "Divider L3 topdown metric",
> "BriefDescription": "Divider L3 topdown metric",
> "MetricGroup": "TopDownL3",
> "MetricName": "divider"
> },
> {
> - "MetricExpr": "armv8_pmuv3_0 at event\\=0x7003@ / CPU_CYCLES",
> + "MetricExpr": "FSU_STALL / CPU_CYCLES",
> "PublicDescription": "FSU stall L3 topdown metric",
> - "BriefDescription": "FSU stall L3 topdown metric",
> + "BriefDescription": "FSU stall L3 topdown metric",
There is a tab here, but it's probably not worth resubmitting over.
Otherwise for the whole set:
Acked-by: James Clark <james.clark at arm.com>
> "MetricGroup": "TopDownL3",
> - "MetricName": "fsu_stall"
> + "MetricName": "fsu_stall_ratio"
> },
> {
> "MetricExpr": "core_bound - divider - fsu_stall",
> @@ -224,7 +224,7 @@
> "MetricName": "mem_bound"
> },
> {
> - "MetricExpr": "armv8_pmuv3_0 at event\\=0x7005@ / CPU_CYCLES",
> + "MetricExpr": "MEM_STALL_ANYSTORE / CPU_CYCLES",
> "PublicDescription": "Store bound L3 topdown metric",
> "BriefDescription": "Store bound L3 topdown metric",
> "MetricGroup": "TopDownL3",
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