[PATCH] arm64: dts: renesas: r8a779f0: Add CA55 operating points

[Viresh Kumar]

On 30-11-22, 15:16, Geert Uytterhoeven wrote:
> Add operating points for running the Cortex-A55 CPU cores on R-Car S4-8
> at various speeds, up to the maximum supported frequency (1200 MHz).
> 
> R-Car S4-8 has 8 Cortex-A55 cores, grouped in 4 clusters.
> CA55 Sub-System 0 (first 2 clusters / CPU cores 0-3) is clocked by Z0φ.
> CA55 Sub-System 1 (last 2 clusters / CPU cores 4-7) is clocked by Z1φ.
> 
> As the two sets of clusters are driven by separate clocks, this requires
> specifying two separate tables (using the same operating performance
> point values), with "opp-shared" to indicate that the CPU cores in each
> set share state.
> 
> Based on a patch in the BSP by Tho Vu.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas at glider.be>
> ---
> To be queued in renesas-devel for v6.3.
> 
> Changes compared to the BSP:
>   - Use two tables.
> 
> Tested on the Renesas Spider development board by using the CPUfreq
> userspace governor, writing the desired CPU clock rate to the CPUfreq
> policy's "scaling_setspeed" file in sysfs, verifying the clock rate of
> the Z0φ and Z1φ clocks in debugfs, and running the dhrystones benchmark
> on the various CPU cores.
> 
> The Linux cpufreq driver creates two policies under
> /sys/devices/system/cpu/cpufreq/: "policy0" and "policy4".
> 
> With a single table and "opp-shared", only "policy0" would be created,
> and clock Z1φ would never be changed.
> With a single table and without "opp-shared", 8 policies would be
> created, and the rate of clocks Z0φ and Z1φ would reflect the value for
> the last touched CPU core from the corresponding set.
> ---
>  arch/arm64/boot/dts/renesas/r8a779f0.dtsi | 62 +++++++++++++++++++++++
>  1 file changed, 62 insertions(+)

Acked-by: Viresh Kumar <viresh.kumar at linaro.org>

-- 
viresh