[GIT PULL 2/7] Renesas ARM DT updates for v6.2 (take two)

[Geert Uytterhoeven]

The following changes since commit b9a0be2054964026aa58966ce9724b672f210835:

  arm64: dts: renesas: r9a07g043: Split out RZ/G2UL SoC specific parts (2022-10-28 14:23:00 +0200)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git tags/renesas-arm-dt-for-v6.2-tag2

for you to fetch changes up to 884af88b756ccb57ed7cb6241c1fbd1080732124:

  arm64: dts: renesas: spider-ethernet: Enable Ethernet Switch and SERDES (2022-11-18 17:08:01 +0100)

----------------------------------------------------------------
Renesas ARM DT updates for v6.2 (take two)

  - Timer (TMU and CMT) and quad Cortex-A76 CPU topology support for
    the R-Car V4H SoC,
  - Watchdog, L2 cache, and system controller support for the RZ/V2M
    SoC on the RZ/V2M Evaluation Kit 2.0,
  - Ethernet Switch and SERDES supports for the R-Car S4-8 SoC and the
    Spider development board,
  - Miscellaneous fixes and improvements.

----------------------------------------------------------------
Biju Das (2):
      arm64: dts: renesas: r9a09g011: Add L2 Cache node
      arm64: dts: renesas: r9a09g011: Add system controller node

Fabrizio Castro (4):
      arm64: dts: renesas: r9a09g011: Fix unit address format error
      arm64: dts: renesas: r9a09g011: Fix I2C SoC specific strings
      arm64: dts: renesas: r9a09g011: Add watchdog node
      arm64: dts: renesas: rzv2mevk2: Enable watchdog

Geert Uytterhoeven (5):
      arm64: dts: renesas: r8a779g0: Add L3 cache controller
      arm64: dts: renesas: r8a779g0: Add secondary CA76 CPU cores
      arm64: dts: renesas: r8a779g0: Add CPUIdle support
      arm64: dts: renesas: r8a779g0: Add CPU core clocks
      arm64: dts: renesas: r8a779g0: Add CA76 operating points

Lad Prabhakar (1):
      arm64: dts: renesas: rzg2l: Drop #address-cells from pinctrl nodes

Pierre Gondois (1):
      arm64: dts: renesas: rzg2l: Add missing cache-level properties

Thanh Quan (1):
      arm64: dts: renesas: r8a779g0: Add CMT node

Wolfram Sang (5):
      arm64: dts: renesas: r8a779f0: Fix HSCIF "brg_int" clock
      arm64: dts: renesas: r8a779f0: Fix SCIF "brg_int" clock
      arm64: dts: renesas: r8a779g0: Add TMU nodes
      arm64: dts: renesas: white-hawk-cpu: Sort RWDT entry correctly
      arm64: dts: renesas: spider-cpu: Switch from SCIF3 to HSCIF0

Yoshihiro Shimoda (2):
      arm64: dts: renesas: r8a779f0: Add Ethernet Switch and SERDES nodes
      arm64: dts: renesas: spider-ethernet: Enable Ethernet Switch and SERDES

 .../boot/dts/renesas/r8a779f0-spider-cpu.dtsi      |  30 +--
 .../boot/dts/renesas/r8a779f0-spider-ethernet.dtsi |  90 +++++++
 arch/arm64/boot/dts/renesas/r8a779f0.dtsi          | 126 +++++++++-
 .../boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi  |   8 +-
 arch/arm64/boot/dts/renesas/r8a779g0.dtsi          | 265 ++++++++++++++++++++-
 arch/arm64/boot/dts/renesas/r9a07g043u.dtsi        |   1 +
 arch/arm64/boot/dts/renesas/r9a07g044.dtsi         |   2 +-
 arch/arm64/boot/dts/renesas/r9a07g054.dtsi         |   2 +-
 arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts  |   4 +
 arch/arm64/boot/dts/renesas/r9a09g011.dtsi         |  31 ++-
 10 files changed, 522 insertions(+), 37 deletions(-)