[PATCH] clk: at91: generated: consider range when calculating best rate

[Codrin.Ciubotariu at microchip.com]

On 17.05.2022 10:14, Stephen Boyd wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Quoting Codrin.Ciubotariu at microchip.com (2022-04-26 00:24:15)
>> On 22.04.2022 04:12, Stephen Boyd wrote:
>>> Quoting Codrin Ciubotariu (2022-04-13 00:13:18)
>>>> clk_generated_best_diff() helps in finding the parent and the divisor to
>>>> compute a rate closest to the required one. However, it doesn't take into
>>>> account the request's range for the new rate. Make sure the new rate
>>>> is within the required range.
>>>>
>>>> Fixes: 8a8f4bf0c480 ("clk: at91: clk-generated: create function to find best_diff")
>>>> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu at microchip.com>
>>>> ---
>>>
>>> Is this fixing anything real or it's just a thing that you noticed and
>>> sent a patch to fix?
>>
>> It fixes the clk_set_min/max_rate() calls to a generated clock. Do you
>> want me to add this fact in the commit description?
>>
> 
> I wanted to know if there are clk_set_min/max_rate() calls on this clk.
> Are there?

Yes, there are:
https://elixir.bootlin.com/linux/latest/source/sound/soc/atmel/mchp-spdifrx.c#L450

Best regards,
Codrin