[PATCH] phy: freescale: imx8m-pcie: Handle IMX8_PCIE_REFCLK_PAD_UNUSED

[Hongxing Zhu]

> -----Original Message-----
> From: Marek Vasut <marex at denx.de>
> Sent: 2022年3月14日 10:51
> To: Hongxing Zhu <hongxing.zhu at nxp.com>; linux-phy at lists.infradead.org
> Cc: Fabio Estevam <festevam at denx.de>; Kishon Vijay Abraham I
> <kishon at ti.com>; Marcel Ziswiler <marcel.ziswiler at toradex.com>;
> dl-linux-imx <linux-imx at nxp.com>; Peng Fan <peng.fan at nxp.com>; Shawn
> Guo <shawnguo at kernel.org>; Vinod Koul <vkoul at kernel.org>;
> linux-arm-kernel at lists.infradead.org
> Subject: Re: [PATCH] phy: freescale: imx8m-pcie: Handle
> IMX8_PCIE_REFCLK_PAD_UNUSED
> 
> On 3/14/22 02:51, Hongxing Zhu wrote:
> >> -----Original Message-----
> >> From: Marek Vasut <marex at denx.de>
> >> Sent: 2022年3月12日 9:38
> >> To: linux-phy at lists.infradead.org
> >> Cc: Marek Vasut <marex at denx.de>; Fabio Estevam <festevam at denx.de>;
> >> Kishon Vijay Abraham I <kishon at ti.com>; Marcel Ziswiler
> >> <marcel.ziswiler at toradex.com>; dl-linux-imx <linux-imx at nxp.com>; Peng
> >> Fan <peng.fan at nxp.com>; Hongxing Zhu <hongxing.zhu at nxp.com>; Shawn
> >> Guo <shawnguo at kernel.org>; Vinod Koul <vkoul at kernel.org>;
> >> linux-arm-kernel at lists.infradead.org
> >> Subject: [PATCH] phy: freescale: imx8m-pcie: Handle
> >> IMX8_PCIE_REFCLK_PAD_UNUSED
> >>
> >> The 'fsl,refclk-pad-mode' DT property used to select clock source for
> >> PCIe PHY can have either of three values, IMX8_PCIE_REFCLK_PAD_INPUT,
> >> IMX8_PCIE_REFCLK_PAD_OUTPUT, IMX8_PCIE_REFCLK_PAD_UNUSED. The
> first
> >> two options are handled correctly by the driver, the last one is not,
> >> this patch implements support for the last option.
> >>
> >> The IMX8_PCIE_REFCLK_PAD_INPUT means PCIE_RESREF is PHY clock input,
> >> the IMX8_PCIE_REFCLK_PAD_OUTPUT means PHY clock are sourced from
> SoC
> >> internal PLL and output to PCIE_RESREF external IO pin. The last
> >> IMX8_PCIE_REFCLK_PAD_UNUSED is a combination of previous two, PHY
> >> clock are sourced from SoC internal PLL and not output anywhere.
> >>
> >> Signed-off-by: Marek Vasut <marex at denx.de>
> > Hi Marek:
> > Thanks for your patch.
> > I assume that you had tested this IMX8_PCIE_REFCLK_PAD_UNUSED option.
> 
> Yes
> 
> > The CLK_N/P pads are not connected on the tested board, right?
> 
> They are connected from MX8MP SoC to MiniPCIe slot.
> There is no external clock source like on the EVK, the MX8MP internal PLL is
> the clock source.
>
Got that, thanks.
 
> > BTW, it's better to add the Fixes tag into the commit log.
> 
> Do you think this should be considered a bugfix ?
Emm...
It's reasonable to consider it as new added.
Okay, I'm fine with it. Thanks again for your patch.

Reviewed-by: Richard Zhu <hongxing.zhu at nxp.com>

Best Regards
Richard Zhu