[PATCH v3 2/4] spi: s3c64xx: support custom value of internal clock divider

[Krzysztof Kozlowski]

On 29/06/2022 12:23, Chanho Park wrote:
> Modern exynos SoCs such as Exynos Auto v9 have different internal clock
> divider, for example "4". To support this internal value, this adds
> clk_div of the s3c64xx_spi_port_config and assign "2" as the default
> value to existing s3c64xx_spi_port_config.
> 


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>


Best regards,
Krzysztof