[PATCH v3 2/4] spi: s3c64xx: support custom value of internal clock divider
Andi Shyti
andi at etezian.org
Wed Jun 29 03:52:47 PDT 2022
Hi Chanho,
On Wed, Jun 29, 2022 at 07:23:02PM +0900, Chanho Park wrote:
> Modern exynos SoCs such as Exynos Auto v9 have different internal clock
> divider, for example "4". To support this internal value, this adds
> clk_div of the s3c64xx_spi_port_config and assign "2" as the default
> value to existing s3c64xx_spi_port_config.
>
> Signed-off-by: Chanho Park <chanho61.park at samsung.com>
Reviewed-by: Andi Shyti <andi at etezian.org>
Thanks,
Andi
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