[PATCH v1 01/17] arm64/cpuinfo: Decode AIVIVT L1 cache policy

[Mark Brown]

On Tue, Jun 07, 2022 at 11:17:09AM +0100, Mark Rutland wrote:
> On Mon, Jun 06, 2022 at 09:12:38PM +0100, Mark Brown wrote:

> ... and in ARM DDI 0487H.a see page D13-5336 where we say:

> | L1Ip, bits [15:14]
> | ...
> | 0b01 ASID-tagged Virtual Index, Virtual Tag (AIVIVT).
> | ...
> | The value 0b01 is reserved in Armv8.

> ... so this is arguably a bug in the ARM ARM.

Yes, that seems like a bug in the ARM given that we now have v9 (and
even without that it's easy to read that as v8.0 rather than v8.* TBH).
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