[PATCH v1 01/17] arm64/cpuinfo: Decode AIVIVT L1 cache policy

[Mark Rutland]

On Mon, Jun 06, 2022 at 09:12:38PM +0100, Mark Brown wrote:
> Since the code was originally written the architecture has documented a
> level 1 instruction cache policy AIVIVT (ASID-tagged, Virtual Index,
> Virtual Tag) for the previously reserved CTR_EL0.L1Ip value 0b01. Update
> the define and the string printed at boot reporting the cache type to
> AIVIVT.

That's not quite right; AIVIVT was removed from ARMv8 in 2017, and we
deliberately removed support from the kernel. See commit:

  155433cb365ee466 ("arm64: cache: Remove support for ASID-tagged VIVT I-caches")

... and in ARM DDI 0487H.a see page D13-5336 where we say:

| L1Ip, bits [15:14]
| ...
| 0b01 ASID-tagged Virtual Index, Virtual Tag (AIVIVT).
| ...
| The value 0b01 is reserved in Armv8.

... so this is arguably a bug in the ARM ARM.

Thanks,
Mark.

> 
> Signed-off-by: Mark Brown <broonie at kernel.org>
> ---
>  arch/arm64/include/asm/cache.h | 2 +-
>  arch/arm64/kernel/cpuinfo.c    | 4 ++--
>  2 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm64/include/asm/cache.h b/arch/arm64/include/asm/cache.h
> index 7c2181c72116..23bfcd92f6ca 100644
> --- a/arch/arm64/include/asm/cache.h
> +++ b/arch/arm64/include/asm/cache.h
> @@ -25,7 +25,7 @@
>  #define CTR_L1IP(ctr)		(((ctr) >> CTR_L1IP_SHIFT) & CTR_L1IP_MASK)
>  
>  #define ICACHE_POLICY_VPIPT	0
> -#define ICACHE_POLICY_RESERVED	1
> +#define ICACHE_POLICY_AIVIVT	1
>  #define ICACHE_POLICY_VIPT	2
>  #define ICACHE_POLICY_PIPT	3
>  
> diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
> index 8eff0a34ffd4..f4a6ddb69385 100644
> --- a/arch/arm64/kernel/cpuinfo.c
> +++ b/arch/arm64/kernel/cpuinfo.c
> @@ -35,7 +35,7 @@ static struct cpuinfo_arm64 boot_cpu_data;
>  
>  static const char *icache_policy_str[] = {
>  	[ICACHE_POLICY_VPIPT]		= "VPIPT",
> -	[ICACHE_POLICY_RESERVED]	= "RESERVED/UNKNOWN",
> +	[ICACHE_POLICY_AIVIVT]		= "AIVIVT",
>  	[ICACHE_POLICY_VIPT]		= "VIPT",
>  	[ICACHE_POLICY_PIPT]		= "PIPT",
>  };
> @@ -347,7 +347,7 @@ static void cpuinfo_detect_icache_policy(struct cpuinfo_arm64 *info)
>  	case ICACHE_POLICY_VPIPT:
>  		set_bit(ICACHEF_VPIPT, &__icache_flags);
>  		break;
> -	case ICACHE_POLICY_RESERVED:
> +	case ICACHE_POLICY_AIVIVT:
>  	case ICACHE_POLICY_VIPT:
>  		/* Assume aliasing */
>  		set_bit(ICACHEF_ALIASING, &__icache_flags);
> -- 
> 2.30.2
>