[PATCH v1 3/4] arm64/mte: Add hwcap for asymmetric mode

[Vincenzo Frascino]

On 1/27/22 7:57 PM, Mark Brown wrote:
> Allow userspace to detect support for asymmetric mode by providing a hwcap
> for it, using the official feature name FEAT_MTE3.
> 
> Signed-off-by: Mark Brown <broonie at kernel.org>

Reviewed-by: Vincenzo Frascino <Vincenzo.Frascino at arm.com>

> ---
>  Documentation/arm64/elf_hwcaps.rst  | 5 +++++
>  arch/arm64/include/asm/hwcap.h      | 1 +
>  arch/arm64/include/uapi/asm/hwcap.h | 1 +
>  arch/arm64/kernel/cpufeature.c      | 1 +
>  arch/arm64/kernel/cpuinfo.c         | 1 +
>  5 files changed, 9 insertions(+)
> 
> diff --git a/Documentation/arm64/elf_hwcaps.rst b/Documentation/arm64/elf_hwcaps.rst
> index b72ff17d600a..a8f30963e550 100644
> --- a/Documentation/arm64/elf_hwcaps.rst
> +++ b/Documentation/arm64/elf_hwcaps.rst
> @@ -259,6 +259,11 @@ HWCAP2_RPRES
>  
>      Functionality implied by ID_AA64ISAR2_EL1.RPRES == 0b0001.
>  
> +HWCAP2_MTE3
> +
> +    Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0011, as described
> +    by Documentation/arm64/memory-tagging-extension.rst.
> +
>  4. Unused AT_HWCAP bits
>  -----------------------
>  
> diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h
> index f68fbb207473..8db5ec0089db 100644
> --- a/arch/arm64/include/asm/hwcap.h
> +++ b/arch/arm64/include/asm/hwcap.h
> @@ -108,6 +108,7 @@
>  #define KERNEL_HWCAP_ECV		__khwcap2_feature(ECV)
>  #define KERNEL_HWCAP_AFP		__khwcap2_feature(AFP)
>  #define KERNEL_HWCAP_RPRES		__khwcap2_feature(RPRES)
> +#define KERNEL_HWCAP_MTE3		__khwcap2_feature(MTE3)
>  
>  /*
>   * This yields a mask that user programs can use to figure out what
> diff --git a/arch/arm64/include/uapi/asm/hwcap.h b/arch/arm64/include/uapi/asm/hwcap.h
> index f03731847d9d..99cb5d383048 100644
> --- a/arch/arm64/include/uapi/asm/hwcap.h
> +++ b/arch/arm64/include/uapi/asm/hwcap.h
> @@ -78,5 +78,6 @@
>  #define HWCAP2_ECV		(1 << 19)
>  #define HWCAP2_AFP		(1 << 20)
>  #define HWCAP2_RPRES		(1 << 21)
> +#define HWCAP2_MTE3		(1 << 22)
>  
>  #endif /* _UAPI__ASM_HWCAP_H */
> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> index a46ab3b1c4d5..57de3f3e0518 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -2485,6 +2485,7 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {
>  #endif
>  #ifdef CONFIG_ARM64_MTE
>  	HWCAP_CAP(SYS_ID_AA64PFR1_EL1, ID_AA64PFR1_MTE_SHIFT, FTR_UNSIGNED, ID_AA64PFR1_MTE, CAP_HWCAP, KERNEL_HWCAP_MTE),
> +	HWCAP_CAP(SYS_ID_AA64PFR1_EL1, ID_AA64PFR1_MTE_SHIFT, FTR_UNSIGNED, ID_AA64PFR1_MTE_ASYMM, CAP_HWCAP, KERNEL_HWCAP_MTE3),
>  #endif /* CONFIG_ARM64_MTE */
>  	HWCAP_CAP(SYS_ID_AA64MMFR0_EL1, ID_AA64MMFR0_ECV_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_ECV),
>  	HWCAP_CAP(SYS_ID_AA64MMFR1_EL1, ID_AA64MMFR1_AFP_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_AFP),
> diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
> index 591c18a889a5..330b92ea863a 100644
> --- a/arch/arm64/kernel/cpuinfo.c
> +++ b/arch/arm64/kernel/cpuinfo.c
> @@ -97,6 +97,7 @@ static const char *const hwcap_str[] = {
>  	[KERNEL_HWCAP_ECV]		= "ecv",
>  	[KERNEL_HWCAP_AFP]		= "afp",
>  	[KERNEL_HWCAP_RPRES]		= "rpres",
> +	[KERNEL_HWCAP_MTE3]		= "mte3",
>  };
>  
>  #ifdef CONFIG_COMPAT
> 

-- 
Regards,
Vincenzo