[bootwrapper PATCH 06/13] aarch64: initialize SCTLR_ELx for the boot-wrapper

[Mark Rutland]

On Tue, Jan 11, 2022 at 02:38:28PM +0000, Robin Murphy wrote:
> On 2022-01-11 13:06, Mark Rutland wrote:
> > The SCTLR_ELx registers contain fields which are UNKNOWN or
> > IMPLEMENTATION DEFINED out of reset. This includes SCTLR_ELx.EE, which
> > defines the endianness of memory accesses (e.g. reads from literal
> > pools). Due to this, portions of boot-wrapper code are not guaranteed
> > top work correctly.
> 
> Nit: "to"

Cheers; fixed.

> > +/*
> > + * RES1 bit definitions definitions as of ARM DDI 0487G.b
> > + *
> > + * These includes bits which are RES1 in some configurations.
> > + */
> > +#define SCTLR_EL3_RES1		(1 << 29 | 1 << 28 | 1 << 23 | 1 << 22 | \
> > +				 1 << 18 | 1 << 16 | 1 << 11 | 1 << 5 | 1 << 4)
> > +
> > +#define SCTLR_EL2_RES1		(1 << 29 | 1 << 28 | 1 << 23 | 1 << 22 | \
> > +				 1 << 18 | 1 << 16 | 1 << 11 | 1 << 5 | 1 << 4)
> > +
> > +#define SCTLR_EL1_RES1		(1 << 29 | 1 << 28 | 1 << 23 | 1 << 22 | \
> > +				 1 << 11 | 1 << 8 | 1 << 7 | 1 << 4)
> > +
> > +#define HCR_EL2_RES1		(1 << 1)
> 
> Maybe use the new BIT() macro in these? I reckon that would be more readable
> overall.

Hmm; I'm not sure why I didn't do that to start with. Done.

Mark.