[bootwrapper PATCH 06/13] aarch64: initialize SCTLR_ELx for the boot-wrapper

[Robin Murphy]

On 2022-01-11 13:06, Mark Rutland wrote:
> The SCTLR_ELx registers contain fields which are UNKNOWN or
> IMPLEMENTATION DEFINED out of reset. This includes SCTLR_ELx.EE, which
> defines the endianness of memory accesses (e.g. reads from literal
> pools). Due to this, portions of boot-wrapper code are not guaranteed
> top work correctly.

Nit: "to"

> Rework the startup code to explicitly initialize SCTLR_ELx for the
> exception level the boot-wrapper was entered at. When entered at EL2
> it's necessary to first initialise HCR_EL2.E2H as this affects the RESx
> behaviour of bits in SCTLR_EL2, and also aliases SCTLR_EL1 to SCTLR_EL2,
> which would break the initialization performed in jump_kernel.
> 
> As we plan to eventually support the highest implemented EL being any of
> EL3/EL2/EL1, code is added to handle all of these exception levels, even
> though we do not currently support starting at EL1.
> 
> We'll initialize other registers in subsequent patches.
> 
> Signed-off-by: Mark Rutland <mark.rutland at arm.com>

[...]

> diff --git a/arch/aarch64/include/asm/cpu.h b/arch/aarch64/include/asm/cpu.h
> index 1053414..f0edd2a 100644
> --- a/arch/aarch64/include/asm/cpu.h
> +++ b/arch/aarch64/include/asm/cpu.h
> @@ -14,6 +14,32 @@
>   #define MPIDR_ID_BITS		0xff00ffffff
>   
>   #define CURRENTEL_EL3		(3 << 2)
> +#define CURRENTEL_EL2		(2 << 2)
> +#define CURRENTEL_EL1		(1 << 2)
> +
> +/*
> + * RES1 bit definitions definitions as of ARM DDI 0487G.b
> + *
> + * These includes bits which are RES1 in some configurations.
> + */
> +#define SCTLR_EL3_RES1		(1 << 29 | 1 << 28 | 1 << 23 | 1 << 22 | \
> +				 1 << 18 | 1 << 16 | 1 << 11 | 1 << 5 | 1 << 4)
> +
> +#define SCTLR_EL2_RES1		(1 << 29 | 1 << 28 | 1 << 23 | 1 << 22 | \
> +				 1 << 18 | 1 << 16 | 1 << 11 | 1 << 5 | 1 << 4)
> +
> +#define SCTLR_EL1_RES1		(1 << 29 | 1 << 28 | 1 << 23 | 1 << 22 | \
> +				 1 << 11 | 1 << 8 | 1 << 7 | 1 << 4)
> +
> +#define HCR_EL2_RES1		(1 << 1)

Maybe use the new BIT() macro in these? I reckon that would be more 
readable overall.

Robin.

> +
> +/*
> + * Initial register values required for the boot-wrapper to run out-of-reset.
> + */
> +#define SCTLR_EL3_RESET		SCTLR_EL3_RES1
> +#define SCTLR_EL2_RESET		SCTLR_EL2_RES1
> +#define SCTLR_EL1_RESET		SCTLR_EL1_RES1
> +#define HCR_EL2_RESET		HCR_EL2_RES1
>   
>   #define ID_AA64PFR0_EL1_GIC	BITS(27, 24)
>