[PATCH 2/3] soc: imx: imx8mp-blk-ctrl: enable global pixclk with HDMI_TX_PHY PD
Peng Fan
peng.fan at nxp.com
Sun Aug 28 18:56:26 PDT 2022
+ Sandor
> Subject: [PATCH 2/3] soc: imx: imx8mp-blk-ctrl: enable global pixclk with
> HDMI_TX_PHY PD
>
> NXP internal information shows that the PHY refclk is gated by the
> GLOBAL_TX_PIX_CLK_EN bit, so to allow the PHY PLL to lock without the
> LCDIF being already active, tie this bit to the HDMI_TX_PHY power domain.
>
> Fixes: e3442022f543 ("soc: imx: add i.MX8MP HDMI blk-ctrl")
> Signed-off-by: Lucas Stach <l.stach at pengutronix.de>
> ---
> drivers/soc/imx/imx8mp-blk-ctrl.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/soc/imx/imx8mp-blk-ctrl.c b/drivers/soc/imx/imx8mp-
> blk-ctrl.c
> index 9401df25c85a..73f672104aaa 100644
> --- a/drivers/soc/imx/imx8mp-blk-ctrl.c
> +++ b/drivers/soc/imx/imx8mp-blk-ctrl.c
> @@ -192,7 +192,7 @@ static void imx8mp_hdmi_blk_ctrl_power_on(struct
> imx8mp_blk_ctrl *bc,
> break;
> case IMX8MP_HDMIBLK_PD_LCDIF:
> regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0,
> - BIT(7) | BIT(16) | BIT(17) | BIT(18) |
> + BIT(16) | BIT(17) | BIT(18) |
> BIT(19) | BIT(20));
> regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1,
> BIT(11));
> regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, @@
> -221,6 +221,7 @@ static void imx8mp_hdmi_blk_ctrl_power_on(struct
> imx8mp_blk_ctrl *bc,
> regmap_set_bits(bc->regmap, HDMI_TX_CONTROL0, BIT(1));
> break;
> case IMX8MP_HDMIBLK_PD_HDMI_TX_PHY:
> + regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(7));
> regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(22)
> | BIT(24));
> regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0,
> BIT(12));
> regmap_clear_bits(bc->regmap, HDMI_TX_CONTROL0,
> BIT(3)); @@ -243,7 +244,7 @@ static void
> imx8mp_hdmi_blk_ctrl_power_off(struct imx8mp_blk_ctrl *bc,
> BIT(4) | BIT(5) | BIT(6));
> regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1,
> BIT(11));
> regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0,
> - BIT(7) | BIT(16) | BIT(17) | BIT(18) |
> + BIT(16) | BIT(17) | BIT(18) |
> BIT(19) | BIT(20));
> break;
> case IMX8MP_HDMIBLK_PD_PAI:
> @@ -271,6 +272,7 @@ static void imx8mp_hdmi_blk_ctrl_power_off(struct
> imx8mp_blk_ctrl *bc,
> case IMX8MP_HDMIBLK_PD_HDMI_TX_PHY:
> regmap_set_bits(bc->regmap, HDMI_TX_CONTROL0, BIT(3));
> regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0,
> BIT(12));
> + regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0,
> BIT(7));
> regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1,
> BIT(22) | BIT(24));
> break;
> default:
> --
> 2.30.2
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