[PATCH] ARM: OMAP4: Fix cpu_pm handling for HS/EMU interrupt save

[Tony Lindgren]

* Tony Lindgren <tony at atomide.com> [210225 14:22]:
> Since commit 55be2f50336f ("ARM: OMAP2+: Handle errors for cpu_pm") we
> allow the drivers to block deeper idle states with cpu_pm notifiers.
> Turns out this change causes random hangs on a mostly idle droid4.
> 
> The hang seems to be caused by reconfiguring the MPUSS domain registers
> after we have already called irq_save_secure_context(). This happens
> on the cpu_pm notifier error path if a driver is busy and returns
> NOTIFY_BAD in CPU_CLUSTER_PM_ENTER handling to block the deeper idle
> states. Note that this issue does not exist for the GP SoCs, for them
> we just save and restore the context in the cpu_pm notifier.
> 
> Let's fix the issue by calling omap4_irq_save_secure_context() later on
> after the cpu_pm notifiers are done. And since we have omap-secure.c,
> let's move omap4_irq_save_secure_context() there.

FYI, this is not the right fix and won't really help it turns out. Based
on testing for about a week on two devices, looks like the right fix is:

[PATCH] ARM: OMAP4: PM: update ROM return address for OSWR and OFF

Regards,

Tony