[boot-wrapper PATCH 09/12] Cleanup `.globl` usage
Andre Przywara
andre.przywara at arm.com
Fri Jul 30 10:39:01 PDT 2021
On Thu, 29 Jul 2021 16:20:47 +0100
Mark Rutland <mark.rutland at arm.com> wrote:
> In some places we use `ENTRY()` to mark an assembly function, whereas in
> others we just use `.globl`. Where we use `.globl` for functions or
> data, we don't keep this close to the actual definition.
>
> Further, `ENTRY()` is a keyword in linker script with a different
> meaning, and so it would be nicer if we didn't use the same term in the
> assembly files.
>
> This patch adds `ASM_FUNC()` and `ASM_DATA()` markers, and uses them
> consistently throughout the codebase.
>
> Signed-off-by: Mark Rutland <mark.rutland at arm.com>
Yes, replayed the transformations, they look correct.
Reviewed-by: Andre Przywara <andre.przywara at arm.com>
Cheers,
Andre
> ---
> arch/aarch32/boot.S | 4 ++--
> arch/aarch32/psci.S | 4 ++--
> arch/aarch32/stack.S | 11 +++--------
> arch/aarch32/utils.S | 4 ++--
> arch/aarch64/boot.S | 8 +++-----
> arch/aarch64/psci.S | 9 +++------
> arch/aarch64/spin.S | 8 +++-----
> arch/aarch64/stack.S | 11 ++++-------
> arch/aarch64/utils.S | 9 +++------
> include/linkage.h | 6 +++++-
> 10 files changed, 30 insertions(+), 44 deletions(-)
>
> diff --git a/arch/aarch32/boot.S b/arch/aarch32/boot.S
> index 0bd1ca2..15e51d4 100644
> --- a/arch/aarch32/boot.S
> +++ b/arch/aarch32/boot.S
> @@ -16,7 +16,7 @@
> .arch_extension virt
>
> .section .init
> -ENTRY(_start)
> +ASM_FUNC(_start)
> /* Stack initialisation */
> cpuid r0, r1
> bl find_logical_id
> @@ -67,7 +67,7 @@ _spin_dead:
> * r0: kernel address
> * r1-r3, sp[0]: kernel arguments
> */
> -ENTRY(jump_kernel)
> +ASM_FUNC(jump_kernel)
> sub sp, #4 @ Ignore fourth argument
> push {r0 - r3}
> mov r5, sp
> diff --git a/arch/aarch32/psci.S b/arch/aarch32/psci.S
> index 0b7663e..dc7aeb7 100644
> --- a/arch/aarch32/psci.S
> +++ b/arch/aarch32/psci.S
> @@ -38,12 +38,12 @@ handle_smc:
> pop {r4 - r12, lr}
> movs pc, lr
>
> -ENTRY(start_el3)
> +ASM_FUNC(start_el3)
> ldr r0, =smc_vectors
> blx setup_vector
> /* pass through */
>
> -ENTRY(start_no_el3)
> +ASM_FUNC(start_no_el3)
> /*
> * For no-el3, we assume that firmware launched the boot-wrapper in
> * non-secure EL2 or EL1. We assume it has its own PSCI implementation
> diff --git a/arch/aarch32/stack.S b/arch/aarch32/stack.S
> index 59f3f52..ac6885b 100644
> --- a/arch/aarch32/stack.S
> +++ b/arch/aarch32/stack.S
> @@ -6,18 +6,13 @@
> * Use of this source code is governed by a BSD-style license that can be
> * found in the LICENSE.txt file.
> */
> -
> - .globl setup_stack
> - .globl stack_top
> - .globl stack_bottom
> -
> .text
> /*
> * Setup initial stack pointer
> * r0: logical CPU ID
> * Clobbers r1 and r2
> */
> -setup_stack:
> +ASM_FUNC(setup_stack)
> mov r1, #STACK_SIZE
> ldr r2, =stack_top
> mls sp, r0, r1, r2
> @@ -25,8 +20,8 @@ setup_stack:
>
> .section .stack
> .align 2
> -stack_bottom:
> +ASM_DATA(stack_bottom)
> .irp cpu, CPU_IDS
> .space STACK_SIZE
> .endr
> -stack_top:
> +ASM_DATA(stack_top)
> diff --git a/arch/aarch32/utils.S b/arch/aarch32/utils.S
> index 53d8747..5809f48 100644
> --- a/arch/aarch32/utils.S
> +++ b/arch/aarch32/utils.S
> @@ -18,7 +18,7 @@
> * Returns MPIDR_INVALID for unknown MPIDRs
> * Clobbers r1, r2, r3.
> */
> -ENTRY(find_logical_id)
> +ASM_FUNC(find_logical_id)
> ldr r2, =id_table
> mov r1, #0
> 1: mov r3, #NR_CPUS
> @@ -40,7 +40,7 @@ ENTRY(find_logical_id)
> * Setup EL3 vectors.
> * r0: vector address
> */
> -ENTRY(setup_vector)
> +ASM_FUNC(setup_vector)
> mcr p15, 0, r0, c12, c0, 1 @ MVBAR
> isb
> bx lr
> diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S
> index fae0188..ca73bcd 100644
> --- a/arch/aarch64/boot.S
> +++ b/arch/aarch64/boot.S
> @@ -6,15 +6,13 @@
> * Use of this source code is governed by a BSD-style license that can be
> * found in the LICENSE.txt file.
> */
> +#include <linkage.h>
>
> #include "common.S"
>
> .section .init
>
> - .globl _start
> - .globl jump_kernel
> -
> -_start:
> +ASM_FUNC(_start)
> cpuid x0, x1
> bl find_logical_id
> cmp x0, #MPIDR_INVALID
> @@ -119,7 +117,7 @@ err_invalid_id:
> * x0: entry address
> * x1-x4: arguments
> */
> -jump_kernel:
> +ASM_FUNC(jump_kernel)
> mov x19, x0
> mov x20, x1
> mov x21, x2
> diff --git a/arch/aarch64/psci.S b/arch/aarch64/psci.S
> index 6dbca11..8bd224b 100644
> --- a/arch/aarch64/psci.S
> +++ b/arch/aarch64/psci.S
> @@ -6,6 +6,7 @@
> * Use of this source code is governed by a BSD-style license that can be
> * found in the LICENSE.txt file.
> */
> +#include <linkage.h>
> #include <psci.h>
>
> #include "common.S"
> @@ -45,9 +46,6 @@ vector:
>
> .text
>
> - .globl start_no_el3
> - .globl start_el3
> -
> err_exception:
> b err_exception
>
> @@ -81,8 +79,7 @@ smc_exit:
> ldp x18, x19, [sp], #16
> eret
>
> -
> -start_el3:
> +ASM_FUNC(start_el3)
> ldr x0, =vector
> bl setup_vector
>
> @@ -95,7 +92,7 @@ start_el3:
> * This PSCI implementation requires EL3. Without EL3 we'll only boot the
> * primary cpu, all others will be trapped in an infinite loop.
> */
> -start_no_el3:
> +ASM_FUNC(start_no_el3)
> cpuid x0, x1
> bl find_logical_id
> cbz x0, psci_first_spin
> diff --git a/arch/aarch64/spin.S b/arch/aarch64/spin.S
> index ca05937..1ea1c0b 100644
> --- a/arch/aarch64/spin.S
> +++ b/arch/aarch64/spin.S
> @@ -6,16 +6,14 @@
> * Use of this source code is governed by a BSD-style license that can be
> * found in the LICENSE.txt file.
> */
> +#include <linkage.h>
>
> #include "common.S"
>
> .text
>
> - .globl start_no_el3
> - .globl start_el3
> -
> -start_el3:
> -start_no_el3:
> +ASM_FUNC(start_el3)
> +ASM_FUNC(start_no_el3)
> cpuid x0, x1
> bl find_logical_id
>
> diff --git a/arch/aarch64/stack.S b/arch/aarch64/stack.S
> index 8fb38ba..c89c388 100644
> --- a/arch/aarch64/stack.S
> +++ b/arch/aarch64/stack.S
> @@ -6,10 +6,7 @@
> * Use of this source code is governed by a BSD-style license that can be
> * found in the LICENSE.txt file.
> */
> -
> - .globl setup_stack
> - .globl stack_top
> - .globl stack_bottom
> +#include <linkage.h>
>
> .text
> /*
> @@ -17,7 +14,7 @@
> * x0: logical CPU ID
> * Clobbers x1 and x2
> */
> -setup_stack:
> +ASM_FUNC(setup_stack)
> mov w1, #STACK_SIZE
> ldr x2, =stack_top
> umsubl x0, w0, w1, x2 // sp = st_base - cpu * st_size
> @@ -26,8 +23,8 @@ setup_stack:
>
> .section .stack
> .align 4
> -stack_bottom:
> +ASM_DATA(stack_bottom)
> .irp cpu, CPU_IDS
> .space STACK_SIZE
> .endr
> -stack_top:
> +ASM_DATA(stack_top)
> diff --git a/arch/aarch64/utils.S b/arch/aarch64/utils.S
> index ae22ea7..85c7f8a 100644
> --- a/arch/aarch64/utils.S
> +++ b/arch/aarch64/utils.S
> @@ -6,11 +6,8 @@
> * Use of this source code is governed by a BSD-style license that can be
> * found in the LICENSE.txt file.
> */
> -
> #include <cpu.h>
> -
> - .globl find_logical_id
> - .globl setup_vector
> +#include <linkage.h>
>
> .text
>
> @@ -20,7 +17,7 @@
> * Sets the Z flag when CPU is primary
> * Clobbers x1, x2, x3
> */
> -find_logical_id:
> +ASM_FUNC(find_logical_id)
> ldr x2, =id_table
> mov x1, xzr
> 1: mov x3, #NR_CPUS // check we haven't walked off the end of the array
> @@ -40,7 +37,7 @@ find_logical_id:
> * Setup EL3 vectors
> * x0: vector address
> */
> -setup_vector:
> +ASM_FUNC(setup_vector)
> msr VBAR_EL3, x0
> isb
> ret
> diff --git a/include/linkage.h b/include/linkage.h
> index 844a811..db8b204 100644
> --- a/include/linkage.h
> +++ b/include/linkage.h
> @@ -13,10 +13,14 @@
>
> #ifdef __ASSEMBLY__
>
> -#define ENTRY(name) \
> +#define ASM_FUNC(name) \
> .globl name; \
> .type name, %function; \
> name:
>
> +#define ASM_DATA(name) \
> + .globl name; \
> + name:
> +
> #endif /* __ASSEMBLY__ */
> #endif
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