[PATCH v2] arm64: mte: avoid TFSR related operations unless in async mode

[Catalin Marinas]

On Thu, 8 Jul 2021 19:35:32 -0700, Peter Collingbourne wrote:
> There is no reason to touch TFSR nor issue a DSB unless our task is
> in asynchronous mode. Since these operations (especially the DSB)
> may be expensive on certain microarchitectures, only perform them
> if necessary.
> 
> Furthermore, stop clearing TFSR on entry because it will be cleared
> on exit and it is not necessary to have any particular value in TFSR
> between entry and exit.

Applied to arm64 (for-next/mte), thanks!

[1/1] arm64: mte: avoid TFSR related operations unless in async mode
      https://git.kernel.org/arm64/c/42b6b10a54f0

-- 
Catalin