[PATCH v2] arm64: mte: avoid TFSR related operations unless in async mode

[Catalin Marinas]

On Thu, Jul 08, 2021 at 07:35:32PM -0700, Peter Collingbourne wrote:
> There is no reason to touch TFSR nor issue a DSB unless our task is
> in asynchronous mode. Since these operations (especially the DSB)
> may be expensive on certain microarchitectures, only perform them
> if necessary.
> 
> Furthermore, stop clearing TFSR on entry because it will be cleared
> on exit and it is not necessary to have any particular value in TFSR
> between entry and exit.

Nitpick: this should be clearer that it's about TFSRE0_EL1 not the
kernel's TFSR_EL1.

Anyway, the patch looks fine, no need to repost. I can change the
comment.

Thanks.

-- 
Catalin