[PATCH] dt-bindings: fpga: convert Xilinx Zynq MPSoC bindings to YAML

[Tom Rix]

On 7/15/21 3:02 AM, Nobuhiro Iwamatsu wrote:
> Convert FPGA Manager for Xilinx Zynq MPSoC bindings documentation to
> YAML.
>
> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu at nigauri.org>
> ---
>   .../bindings/fpga/xlnx,zynqmp-pcap-fpga.txt   | 25 -------------
>   .../bindings/fpga/xlnx,zynqmp-pcap-fpga.yaml  | 36 +++++++++++++++++++
>   2 files changed, 36 insertions(+), 25 deletions(-)
>   delete mode 100644 Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.txt
>   create mode 100644 Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.yaml
>
> diff --git a/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.txt b/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.txt
> deleted file mode 100644
> index 3052bf619dd547..00000000000000
> --- a/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.txt
> +++ /dev/null
> @@ -1,25 +0,0 @@
> -Devicetree bindings for Zynq Ultrascale MPSoC FPGA Manager.
> -The ZynqMP SoC uses the PCAP (Processor configuration Port) to configure the
> -Programmable Logic (PL). The configuration uses  the firmware interface.
> -
> -Required properties:
> -- compatible: should contain "xlnx,zynqmp-pcap-fpga"
> -
> -Example for full FPGA configuration:
> -
> -	fpga-region0 {
> -		compatible = "fpga-region";
> -		fpga-mgr = <&zynqmp_pcap>;
> -		#address-cells = <0x1>;
> -		#size-cells = <0x1>;
> -	};
> -
> -	firmware {
> -		zynqmp_firmware: zynqmp-firmware {
> -			compatible = "xlnx,zynqmp-firmware";
> -			method = "smc";
> -			zynqmp_pcap: pcap {
> -				compatible = "xlnx,zynqmp-pcap-fpga";
> -			};
> -		};
> -	};
> diff --git a/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.yaml b/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.yaml
> new file mode 100644
> index 00000000000000..565b835b7fbac0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.yaml
> @@ -0,0 +1,36 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/fpga/xlnx,zynqmp-pcap-fpga.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Xilinx Zynq Ultrascale MPSoC FPGA Manager Device Tree Bindings
> +
> +maintainers:
> +  - Michal Simek <michal.simek at xilinx.com>
Needs a change to MAINTAINERS ?
> +
> +description: |
> +  Device Tree Bindings for Zynq Ultrascale MPSoC FPGA Manager.
> +  The ZynqMP SoC uses the PCAP (Processor configuration Port) to

Configuration

Tom

> +  configure the Programmable Logic (PL). The configuration uses the
> +  firmware interface.
> +
> +properties:
> +  compatible:
> +    const: xlnx,zynqmp-pcap-fpga
> +
> +required:
> +  - compatible
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    firmware {
> +      zynqmp_firmware: zynqmp-firmware {
> +        zynqmp_pcap: pcap {
> +          compatible = "xlnx,zynqmp-pcap-fpga";
> +        };
> +      };
> +    };
> +...