[PATCH v3 11/15] soc: xilinx: vcu: remove calculation of PLL configuration

[Stephen Boyd]

Quoting Michael Tretter (2021-01-20 23:16:55)
> As the consumers are now responsible for setting the clock rate via
> clock framework, the clock rate is now calculated using round_rate and
> the driver does not need to calculate the clock rate beforehand.
> 
> Remove the code that calculates the PLL configuration.
> 
> Signed-off-by: Michael Tretter <m.tretter at pengutronix.de>
> Acked-by: Michal Simek <michal.simek at xilinx.com>
> ---

Applied to clk-next