[PATCH v3 10/15] soc: xilinx: vcu: make the PLL configurable

[Stephen Boyd]

Quoting Michael Tretter (2021-01-20 23:16:54)
> Do not configure the PLL when probing the driver, but register the clock
> in the clock framework and do the configuration based on the respective
> callbacks.
> 
> This is necessary to allow the consumers, i.e., encoder and decoder
> drivers, of the xlnx_vcu clock provider to set the clock rate and
> actually enable the clocks without relying on some pre-configuration.
> 
> Signed-off-by: Michael Tretter <m.tretter at pengutronix.de>
> Acked-by: Michal Simek <michal.simek at xilinx.com>
> ---

Applied to clk-next