[PATCH 15/18] irqchip/apple-aic: Add support for the Apple Interrupt Controller

Marc Zyngier maz at kernel.org
Mon Feb 8 06:36:02 EST 2021

On Mon, 08 Feb 2021 10:29:23 +0000,
Arnd Bergmann <arnd at kernel.org> wrote:
> On Mon, Feb 8, 2021 at 10:25 AM Marc Zyngier <maz at kernel.org> wrote:
> > On Thu, 04 Feb 2021 20:39:48 +0000, Hector Martin <marcan at marcan.st> wrote:
> > > +{
> > > +     return readl(ic->base + reg);
> >
> > Please consider using the _relaxed accessors, as I don't think any of
> > these interacts with memory (apart from IPIs, of course).
> MSI interrupts require serializing with DMA, so at the minimum I think there
> needs to be something that ensures that DMA from device into memory
> has completed before delivering the completion interrupt to a driver. This
> may already be implied when the AIC is entered, but this is hard to know
> without actual hardware specs.

If there is a sync with memory required, it should happen at the point
where it is Acked, not when masked/unmasked or anything else. And
given that you want to sync with an external agent (the DMA producer),
the DMB generated by readl won't save you, as it only orders CPU
accesses AFAICT.

So if MSIs require some additional synchronisation we probably need a
DSB somewhere if the HW doesn't guarantee ordering of DMA vs
MSIs. Whether it does or not is anyone's bet.



Without deviation from the norm, progress is not possible.

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