[PATCH] ARM: dts: imx6qdl-dhcom: Align PHY reset timing with other DHCOM SoMs
Shawn Guo
shawnguo at kernel.org
Tue Dec 14 00:30:16 PST 2021
On Wed, Dec 08, 2021 at 04:05:43PM +0100, Christoph Niedermaier wrote:
> According to datasheet Microchip LAN8710A/LAN8710Ai DS00002164B [1]
> the reset should stay asserted for at least 100uS and software
> should wait at least 200nS. On other DHCOM SoMs with the SMSC
> LAN8710Ai PHY both reset delays are 500us. This should be plenty
> and for consistency, the i.MX6 SoM should also use these delays.
>
> [1] https://ww1.microchip.com/downloads/en/DeviceDoc/00002164B.pdf
>
> Signed-off-by: Christoph Niedermaier <cniedermaier at dh-electronics.com>
> Cc: Shawn Guo <shawnguo at kernel.org>
> Cc: Fabio Estevam <festevam at denx.de>
> Cc: Marek Vasut <marex at denx.de>
> Cc: NXP Linux Team <linux-imx at nxp.com>
> Cc: kernel at dh-electronics.com
> To: linux-arm-kernel at lists.infradead.org
Applied, thanks!
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