[PATCH 3/6] dt-bindings: i2c: exynos5: Add bus clock

[Krzysztof Kozlowski]

On 01/12/2021 20:04, Sam Protsenko wrote:
> In new Exynos SoCs (like Exynos850) where HSI2C is implemented as a
> part of USIv2 block, there are two clocks provided to HSI2C controller:
>   - PCLK: bus clock (APB), provides access to register interface
>   - IPCLK: operating IP-core clock; SCL is derived from this one
> 
> Both clocks have to be asserted for HSI2C to be functional in that case.
> 
> Modify bindings doc to allow specifying bus clock in addition to
> already described operating clock. Make it optional though, as older
> Exynos SoC variants only have one HSI2C clock.

I understand that it is required on newer SoCs, so you need "if:" adding
it to required properties on Autov8 or 850.

> 
> Signed-off-by: Sam Protsenko <semen.protsenko at linaro.org>
> ---
>  .../devicetree/bindings/i2c/i2c-exynos5.yaml          | 11 ++++++++---
>  1 file changed, 8 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
> index db20e703dea0..a212c1d5e7d9 100644
> --- a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
> +++ b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
> @@ -49,11 +49,16 @@ properties:
>        clock-frequency is >= 1MHz.
>  
>    clocks:
> -    maxItems: 1
> -    description: I2C operating clock
> +    minItems: 1
> +    items:
> +      - description: I2C operating clock
> +      - description: Bus clock (APB)
>  
>    clock-names:
> -    const: hsi2c
> +    minItems: 1
> +    items:
> +      - const: hsi2c
> +      - const: hsi2c_pclk
>  
>  required:
>    - compatible
> 


Best regards,
Krzysztof