[PATCH 2/2] irqchip: nvic: Use GENERIC_IRQ_MULTI_HANDLER

[Arnd Bergmann]

On Wed, Dec 1, 2021 at 3:15 PM Vladimir Murzin <vladimir.murzin at arm.com> wrote:
> On 12/1/21 2:05 PM, Arnd Bergmann wrote:
> >
> > Yes, I saw that, but I'm not too worried about this on Arm, as we don't
> > support that combination (SMP without MMU) in any of our platforms or
> > in Kconfig without additional patches.
>
> That's true, yet it seems to be broken for other arches which seems to be
> supported (w/o additional patches?)

Sure, it should get fixed, it's just not on my list of high-priority problems.
For j2, I think there isn't much work going on at the moment, and I think
there are other problems on sh nommu smp. For riscv K210, I think there
isn't as much interest any more after MMU-based platforms are becoming
more available.

> > What target are you actually testing on?
> >
>
> It is MPS3 board with range of FPGA images. M and R class supported yet
> AN536 (Cortex-R52x2) has issues which prevents it using in SMP; recent
> images for M class require new timer (which is WIP).
>
> I also have access to Fast Models - they are easier and quicker to test
> and do not require visiting office :)

Ok, I see. What are your plans for the Cortex-R support? My impression
was that there isn't really much interest in upstream support as there is
no commercial SoC platform using 32-bit Cortex-R that makes sense to
run Linux on (any more), and Cortex-R82 would run with MMU enabled.
Do you expect this to change in the future?

As far as I can tell, there is no SMP-capable Cortex-M. If there is,
then Ard's THREAD_INFO_IN_TASK series may have another problem
because of the lack of the TPIDRURO register. Again, I'm not too
worried about that because mainline Linux does not support this
configuration, but it's something to keep in mind.

         Arnd