[PATCH] arm64: Disable fine grained traps on boot

Mark Brown broonie at kernel.org
Thu Apr 1 16:48:05 BST 2021


On Thu, Apr 01, 2021 at 04:14:35PM +0100, Marc Zyngier wrote:
> On Thu, 01 Apr 2021 13:49:36 +0100,
> Mark Brown <broonie at kernel.org> wrote:

> > +	msr_s	SYS_HFGRTR_EL2, xzr
> > +	msr_s	SYS_HFGITR_EL2, xzr
> > +	msr_s	SYS_HFGWTR_EL2, xzr

> nit: consider grouping SYS_HFGWTR_EL2 and SYS_HFGRTR_EL2 together,
> since they affect the same registers.

Ack, I'd sorted them numerically IIRC.

> > +	mrs	x1, id_aa64pfr0_el1		// AMU traps UNDEF without AMU
> > +	ubfx	x1, x1, #ID_AA64PFR0_AMU_SHIFT, #4
> > +	cbz	x1, .Lskip_fgt_\@

> > +	msr_s	SYS_HAFGRTR_EL2, xzr

> Do we need to document the need for SCR_EL3.FGTEn to be set so that
> these register accesses don't trap? That'd be consistent with what we
> do for other features (PtrAuth, AMU...).

Yes, good point.  We should if this is going in - this is the result of
some other stuff I've been sending to document disabling these on boot,
Will wanted to have code doing that, so I'll pull that into there.  It
does end up being a bit weird that we demand this be enabled so we can
explicitly not use it, but better to do that so we can in future decide
to take advantage of it.
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