[PATCH] arm64: Disable fine grained traps on boot

[Marc Zyngier]

Thanks Will for the bounce.

On Thu, 01 Apr 2021 13:49:36 +0100,
Mark Brown <broonie at kernel.org> wrote:
> 
> The arm64 FEAT_FGT extension introduces a set of traps to EL2 for accesses
> to small sets of registers and instructions from EL1 and EL0.  Currently
> Linux makes no use of this feature, ensure that it is not active at boot by
> disabling the traps during EL2 setup.
> 
> Signed-off-by: Mark Brown <broonie at kernel.org>
> ---
>  arch/arm64/include/asm/el2_setup.h | 21 +++++++++++++++++++++
>  arch/arm64/include/asm/sysreg.h    |  6 ++++++
>  2 files changed, 27 insertions(+)
> 
> diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h
> index d77d358f9395..f94ef3a76877 100644
> --- a/arch/arm64/include/asm/el2_setup.h
> +++ b/arch/arm64/include/asm/el2_setup.h
> @@ -131,6 +131,26 @@
>  .Lskip_sve_\@:
>  .endm
>  
> +/* Disable any fine grained traps */
> +.macro __init_el2_fgt
> +	mrs	x1, id_aa64mmfr0_el1
> +	ubfx	x1, x1, #ID_AA64MMFR0_FGT_SHIFT, #4
> +	cbz	x1, .Lskip_fgt_\@
> +
> +	msr_s	SYS_HDFGRTR_EL2, xzr
> +	msr_s	SYS_HDFGWTR_EL2, xzr
> +	msr_s	SYS_HFGRTR_EL2, xzr
> +	msr_s	SYS_HFGITR_EL2, xzr
> +	msr_s	SYS_HFGWTR_EL2, xzr

nit: consider grouping SYS_HFGWTR_EL2 and SYS_HFGRTR_EL2 together,
since they affect the same registers.

> +
> +	mrs	x1, id_aa64pfr0_el1		// AMU traps UNDEF without AMU
> +	ubfx	x1, x1, #ID_AA64PFR0_AMU_SHIFT, #4
> +	cbz	x1, .Lskip_fgt_\@
> +
> +	msr_s	SYS_HAFGRTR_EL2, xzr

Do we need to document the need for SCR_EL3.FGTEn to be set so that
these register accesses don't trap? That'd be consistent with what we
do for other features (PtrAuth, AMU...).

> +.Lskip_fgt_\@:
> +.endm
> +
>  .macro __init_el2_nvhe_prepare_eret
>  	mov	x0, #INIT_PSTATE_EL1
>  	msr	spsr_el2, x0
> @@ -155,6 +175,7 @@
>  	__init_el2_nvhe_idregs
>  	__init_el2_nvhe_cptr
>  	__init_el2_nvhe_sve
> +	__init_el2_fgt
>  	__init_el2_nvhe_prepare_eret
>  .endm
>  
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index d4a5fca984c3..b35468927363 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -475,9 +475,15 @@
>  #define SYS_PMCCFILTR_EL0		sys_reg(3, 3, 14, 15, 7)
>  
>  #define SYS_SCTLR_EL2			sys_reg(3, 4, 1, 0, 0)
> +#define SYS_HFGRTR_EL2			sys_reg(3, 4, 1, 1, 4)
> +#define SYS_HFGWTR_EL2			sys_reg(3, 4, 1, 1, 5)
> +#define SYS_HFGITR_EL2			sys_reg(3, 4, 1, 1, 6)
>  #define SYS_ZCR_EL2			sys_reg(3, 4, 1, 2, 0)
>  #define SYS_TRFCR_EL2			sys_reg(3, 4, 1, 2, 1)
>  #define SYS_DACR32_EL2			sys_reg(3, 4, 3, 0, 0)
> +#define SYS_HDFGRTR_EL2			sys_reg(3, 4, 3, 1, 4)
> +#define SYS_HDFGWTR_EL2			sys_reg(3, 4, 3, 1, 5)
> +#define SYS_HAFGRTR_EL2			sys_reg(3, 4, 3, 1, 6)
>  #define SYS_SPSR_EL2			sys_reg(3, 4, 4, 0, 0)
>  #define SYS_ELR_EL2			sys_reg(3, 4, 4, 0, 1)
>  #define SYS_IFSR32_EL2			sys_reg(3, 4, 5, 0, 1)

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.