[PATCH v11 04/11] PCI: brcmstb: Add suspend and resume pm_ops

Florian Fainelli f.fainelli at gmail.com
Thu Sep 10 14:54:10 EDT 2020



On 9/10/2020 11:50 AM, Rob Herring wrote:
> On Thu, Sep 10, 2020 at 10:42 AM Jim Quinlan <james.quinlan at broadcom.com> wrote:
>>
>> On Thu, Sep 10, 2020 at 11:56 AM Rob Herring <robh at kernel.org> wrote:
>>>
>>> On Mon, Aug 24, 2020 at 03:30:17PM -0400, Jim Quinlan wrote:
>>>> From: Jim Quinlan <jquinlan at broadcom.com>
>>>>
>>>> Broadcom Set-top (BrcmSTB) boards typically support S2, S3, and S5 suspend
>>>> and resume.  Now the PCIe driver may do so as well.
>>>>
>>>> Signed-off-by: Jim Quinlan <jquinlan at broadcom.com>
>>>> Acked-by: Florian Fainelli <f.fainelli at gmail.com>
>>>> ---
>>>>   drivers/pci/controller/pcie-brcmstb.c | 47 +++++++++++++++++++++++++++
>>>>   1 file changed, 47 insertions(+)
>>>>
>>>> diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
>>>> index c2b3d2946a36..3d588ab7a6dd 100644
>>>> --- a/drivers/pci/controller/pcie-brcmstb.c
>>>> +++ b/drivers/pci/controller/pcie-brcmstb.c
>>>> @@ -978,6 +978,47 @@ static void brcm_pcie_turn_off(struct brcm_pcie *pcie)
>>>>        brcm_pcie_bridge_sw_init_set(pcie, 1);
>>>>   }
>>>>
>>>> +static int brcm_pcie_suspend(struct device *dev)
>>>> +{
>>>> +     struct brcm_pcie *pcie = dev_get_drvdata(dev);
>>>> +
>>>> +     brcm_pcie_turn_off(pcie);
>>>> +     clk_disable_unprepare(pcie->clk);
>>>> +
>>>> +     return 0;
>>>> +}
>>>> +
>>>> +static int brcm_pcie_resume(struct device *dev)
>>>> +{
>>>> +     struct brcm_pcie *pcie = dev_get_drvdata(dev);
>>>> +     void __iomem *base;
>>>> +     u32 tmp;
>>>> +     int ret;
>>>> +
>>>> +     base = pcie->base;
>>>> +     clk_prepare_enable(pcie->clk);
>>>> +
>>>> +     /* Take bridge out of reset so we can access the SERDES reg */
>>>> +     brcm_pcie_bridge_sw_init_set(pcie, 0);
>>>> +
>>>> +     /* SERDES_IDDQ = 0 */
>>>> +     tmp = readl(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG);
>>>> +     u32p_replace_bits(&tmp, 0, PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK);
>>>> +     writel(tmp, base + PCIE_MISC_HARD_PCIE_HARD_DEBUG);
>>>> +
>>>> +     /* wait for serdes to be stable */
>>>> +     udelay(100);
>>>
>>> Really needs to be a spinloop?
>>>
>>>> +
>>>> +     ret = brcm_pcie_setup(pcie);
>>>> +     if (ret)
>>>> +             return ret;
>>>> +
>>>> +     if (pcie->msi)
>>>> +             brcm_msi_set_regs(pcie->msi);
>>>> +
>>>> +     return 0;
>>>> +}
>>>> +
>>>>   static void __brcm_pcie_remove(struct brcm_pcie *pcie)
>>>>   {
>>>>        brcm_msi_remove(pcie);
>>>> @@ -1087,12 +1128,18 @@ static int brcm_pcie_probe(struct platform_device *pdev)
>>>>
>>>>   MODULE_DEVICE_TABLE(of, brcm_pcie_match);
>>>>
>>>> +static const struct dev_pm_ops brcm_pcie_pm_ops = {
>>>> +     .suspend_noirq = brcm_pcie_suspend,
>>>> +     .resume_noirq = brcm_pcie_resume,
>>>
>>> Why do you need interrupts disabled? There's 39 cases of .suspend_noirq
>>> and 1352 of .suspend in the tree.
>>
>> I will test switching this to  suspend_late/resume_early.
> 
> Why not just the 'regular' flavor suspend/resume?

We must have inherited this from when the driver was not a 
platform_device back in our 3.14 downstream kernel and we used 
syscore_ops to do the system suspend/resume.

Later on, we sort of mechanically made those _noirq() to preserve the 
semantics of syscore_ops, but in hindsight it should not be necessary, 
the regular suspsend/resume should work and the device driver model 
ordering between parent/child should take care of the bridge being 
suspended last within the PCI bus type that is.
-- 
Florian



More information about the linux-arm-kernel mailing list