[PATCH v3 1/2] arm64: dts: meson-g12b-odroid-n2: Enable RTC controller node

[Neil Armstrong]

On 24/08/2020 15:41, Anand Moon wrote:
> hi All,
> 
> On Fri, 21 Aug 2020 at 10:13, Anand Moon <linux.amoon at gmail.com> wrote:
>>
>> Hi Kevin,
>>
>> Thanks for your review comments.
>>
>> On Fri, 21 Aug 2020 at 01:03, Kevin Hilman <khilman at baylibre.com> wrote:
>>>
>>> Anand Moon <linux.amoon at gmail.com> writes:
>>>
>>>> Enable RTC PCF8563 node on Odroid-N2 SBC, In order to
>>>> support the RTC wakealarm feature for suspend and resume.
>>>> Also assign an alias to the pcf8563 to rtc0 and meson-vrtc to rtc1
>>>> timer device to prevent it being assigned to /dev/rtc0
>>>> which disto userspace tools assume is a clock device.
>>>>
>>>> Cc: Neil Armstrong <narmstrong at baylibre.com>
>>>> Cc: Kevin Hilman <khilman at baylibre.com>
>>>> Suggested-by: Christian Hewitt <christianshewitt at gmail.com>
>>>> Signed-off-by: Anand Moon <linux.amoon at gmail.com>
>>>> ---
>>>> Changes V3
>>>> --Drop the INI GPIOAO.BIT7 pinctrl.
>>>
>>> Why did you drop this GPIO?  Isn't this the GPIO that the RTC uses to
>>> wakeup the system?  If so, this should be included as part of this
>>> patch.
>>>
>>> It probably still works because the bootloader configures this GPIO as
>>> input, but the kernel should not rely on the booloader for that, so
>>> please include as part of this patch.
>>>
>>
>> Ok I will figure out the correct pinctrl need for this settings.
>> looking into the Odroid N2 schematics.
>>
> 
> I am trying to map the RTC INT pinctrl, ie RTC INT GPIOAO.BIT7.


Simply add:

interrupt-parent = <&gpio_intc>;
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;

to reflect the interrupt connection.

No need to setup pinctrl here since the GPIO input is always connected to the gpio irq generator whatever pinctrl mode is set.

Neil

> 
> So from the schematics it is seen below.
> RTC INT  GPIOAO_7 (AV46)   GPIOAO_7 (JTAG_A_TMS // TSIN_A_DIN0 //
> TDMB_FS // TDMB_SLV_FS)
> 
> But the S922X datasheet this pin *AV46* shows to following settings,
> AN16    DVSS    AV46      GPIOAO_7    BD19    BOOT_11
> 
> From the schematics it BOOT_11 is linked to
>               BOOT_11 (NAND_CE0)      BD19
> 
> So can I conclude that BOOT_11 (nand_ce0_pins) pin linked to the RTC INT setting
> Please can somebody help me with correct pinctrl settings.
> 
> Best Regards
> -Anand Moon
>