[PATCH] mmc: sdhci-of-arasan: Add quirk to avoid erroneous msg
Phil Edworthy
phil.edworthy at renesas.com
Tue Feb 27 06:14:15 PST 2018
Hi Adrian,
On 27 February 2018 14:08, Adrian Hunter wrote:
> On 27/02/18 15:55, Phil Edworthy wrote:
> > Since the controller does not support the end-of-busy IRQ, don't use it.
> > Otherwise, on older SD cards you will get lots of these messages:
> > "mmc0: Got data interrupt 0x00000002 even though no data operation was
> in progress"
>
> SDHCI_QUIRK2_STOP_WITH_TC may be the quirk you want but it doesn't
> match your description. SDHCI_QUIRK2_STOP_WITH_TC is when we always
> get a TC
> (end-of-busy) IRQ with the STOP command even when we didn't ask for
> one.
> Hence the TC interrupt (0x00000002) comes when we think we are already
> finished.
Right, thanks for clarifying, I'll fixup the message.
> >
> > This has been reported on Xilinx devices that also use the Arasan IP.
> > See https://patchwork.kernel.org/patch/8062871/
> >
> > This has been tested on the Renesas RZ/ND-DB board with the RZ/N1 SoC.
> >
> > Signed-off-by: Phil Edworthy <phil.edworthy at renesas.com>
> > ---
> > drivers/mmc/host/sdhci-of-arasan.c | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/mmc/host/sdhci-of-arasan.c
> > b/drivers/mmc/host/sdhci-of-arasan.c
> > index c33a5f7..ab66e32 100644
> > --- a/drivers/mmc/host/sdhci-of-arasan.c
> > +++ b/drivers/mmc/host/sdhci-of-arasan.c
> > @@ -290,7 +290,8 @@ static const struct sdhci_pltfm_data
> sdhci_arasan_pdata = {
> > .ops = &sdhci_arasan_ops,
> > .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
> > .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
> > - SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
> > + SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN |
> > + SDHCI_QUIRK2_STOP_WITH_TC,
> > };
> >
> > static u32 sdhci_arasan_cqhci_irq(struct sdhci_host *host, u32
> > intmask)
> >
More information about the linux-arm-kernel
mailing list