[linux-sunxi] [PATCH 2/3] ARM: dts: sun8i: add usb_otg and OHCI/EHCI for usbc0 on H3

[Icenowy Zheng]

28.02.2017, 23:46, "Chen-Yu Tsai" <wens at csie.org>:
> On Tue, Feb 28, 2017 at 11:27 PM, Icenowy Zheng <icenowy at aosc.xyz> wrote:
>>  Allwinner H3 have a dual-routed USB PHY0 -- routed to either OHCI/EHCI
>>  or MUSB controller.
>>
>>  Add device nodes for these controllers.
>>
>>  Signed-off-by: Icenowy Zheng <icenowy at aosc.xyz>
>>  ---
>>   arch/arm/boot/dts/sun8i-h3.dtsi | 36 ++++++++++++++++++++++++++++++++++++
>>   1 file changed, 36 insertions(+)
>>
>>  diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
>>  index 27780b97c863..bc9a53edf371 100644
>>  --- a/arch/arm/boot/dts/sun8i-h3.dtsi
>>  +++ b/arch/arm/boot/dts/sun8i-h3.dtsi
>>  @@ -206,6 +206,19 @@
>>                          #size-cells = <0>;
>>                  };
>>
>>  + usb_otg: usb at 01c19000 {
>>  + compatible = "allwinner,sun8i-h3-musb";
>>  + reg = <0x01c19000 0x0400>;
>>  + clocks = <&ccu CLK_BUS_OTG>;
>>  + resets = <&ccu RST_BUS_OTG>;
>>  + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
>>  + interrupt-names = "mc";
>>  + phys = <&usbphy 0>;
>>  + phy-names = "usb";
>>  + extcon = <&usbphy 0>;
>>  + status = "disabled";
>>  + };
>>  +
>>                  usbphy: phy at 01c19400 {
>>                          compatible = "allwinner,sun8i-h3-usb-phy";
>>                          reg = <0x01c19400 0x2c>,
>>  @@ -238,6 +251,29 @@
>>                          #phy-cells = <1>;
>>                  };
>>
>>  + ehci0: usb at 01c1a000 {
>>  + compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
>>  + reg = <0x01c1a000 0x100>;
>>  + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
>>  + clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>;
>>  + resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
>>  + phys = <&usbphy 0>;
>>  + phy-names = "usb";
>
> So this bit is slightly concerning. IIRC the xHCI drivers power on the phy when
> probed, which means VBUS is _always_ going to be powered on, even when it's
> supposed to be in peripheral mode. You're probably going to need to rework
> either the phy or the musb driver to cope with this.
>
> Or maybe just dropping the phy handle here and letting the musb driver handle
> it would work, but that requires the musb driver be loaded.

Tested this solution.

I may choose it in the next version.

Hans, how do you think of this solution?

>
> ChenYu
>
>>  + status = "disabled";
>>  + };
>>  +
>>  + ohci0: usb at 01c1a400 {
>>  + compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
>>  + reg = <0x01c1a400 0x100>;
>>  + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
>>  + clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>,
>>  + <&ccu CLK_USB_OHCI0>;
>>  + resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
>>  + phys = <&usbphy 0>;
>>  + phy-names = "usb";
>>  + status = "disabled";
>>  + };
>>  +
>>                  ehci1: usb at 01c1b000 {
>>                          compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
>>                          reg = <0x01c1b000 0x100>;
>>  --
>>  2.11.1
>>
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