[PATCH v5 2/3] nvmem: sunxi-sid: add support for H3's SID controller
Icenowy Zheng
icenowy at aosc.xyz
Tue Feb 28 00:35:31 PST 2017
28.02.2017, 14:43, "Maxime Ripard" <maxime.ripard at free-electrons.com>:
> On Tue, Feb 28, 2017 at 03:27:14AM +0800, Icenowy Zheng wrote:
>> The H3 SoC have a bigger SID controller, which has its direct read
>> address at 0x200 position in the SID block, not 0x0.
>>
>> Also, H3 SID controller has some silicon bug that makes the direct read
>> value wrong at cold boot, add code to workaround the bug. (This bug has
>> already been fixed on A64 and later SoCs)
>>
>> Signed-off-by: Icenowy Zheng <icenowy at aosc.xyz>
>
> Acked-by: Maxime Ripard <maxime.ripard at free-electrons.com>
Who will finally apply these patches?
I have seen that you are one of the maintainers of NVMEM subsystem.
>
> Thanks!
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
More information about the linux-arm-kernel
mailing list