[PATCH V4 6/7] iommu/msm: Use writel_relaxed and add a barrier
sricharan at codeaurora.org
Fri May 20 04:18:26 PDT 2016
>>If you need the barrier after the write, it probably was already faulty
>>before, because writel only implies a barrier before the store, not
>>after. Of course all the barriers likely made the whole process so
>>slow that you never hit that race in the end.
>ya, it could have worked in this way and i never saw a race issue before this.
>The only reason for changing this was to optimise out the additonal barriers
>that were happening. I do not see any issue now as well, only that the writes would
I reposted a patch here  with comments, i had to delete the
old accessors though as it became unused now.
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