[PATCH 07/13] ARM: dts: r8a7792: initial SoC device tree

Sergei Shtylyov sergei.shtylyov at cogentembedded.com
Wed Jun 1 07:00:27 PDT 2016

On 06/01/2016 03:57 AM, Simon Horman wrote:

>> The initial R8A7792 SoC device tree including 2 CPU cores, GIC, timer, SYSC,
>> and the required  clock descriptions.
>> Signed-off-by: Sergei Shtylyov <sergei.shtylyov at cogentembedded.com>
> This is rather large for an initial DTSI. Did you give any consideration
> to splitting it up: e.g. only providing what is needed to get to a serial
> console?

    You mean dropping the majority of clocks, right?

> With regards to SMP. Have you checked to make sure CPU hotplug works
> on all CPUs? And that the system behaves sanely on suspend/resume.
> If it is not possible to verify this at this stage then I would recommend
> only enabling one CPU at this stage.

    No, the SMP support isn't ready yet.
    And I'll have to enable SMP on R8A7794 as well...

MBR, Sergei

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