[linux-sunxi] Problem with Allwinner H3 clocks

[Jean-Francois Moine]

On Thu, 28 Jan 2016 20:29:31 +0100
Maxime Ripard <maxime.ripard at free-electrons.com> wrote:

> > You are right, I had these lines in my DT. Thanks.
> 
> And even though you had these lines, it was still not working? Or is
> it working now? I'm confused.

It was not working with these lines because I was using the real pll8,
and, so, Jens' old patch was needed.

> > The A23/A33/H3 (and surely some other SoCs) documentations about
> > the peripheral/periph/periph0/periph1 PLLs say:
> > 
> > 	Note: The PLL Output should be fixed to 600MHz, it is not
> > 	recommended to vary this value arbitrarily.
> 
> I don't know if it's worth it at this point. The pll6 seems to work
> fine at other rates. Have you experienced any breakage when running at
> another frequency?

Each times I started my machine, the clocks (periph0 and 1) were 600MHz.
I think that this value should be OK for all subdevices (with the
kernel 3.4, I have 200MHz for AHB1 and underneath, 600MHz for
deinterlace and CSI, 300MHz and 50MHz for MMC).

-- 
Ken ar c'hentañ	|	      ** Breizh ha Linux atav! **
Jef		|		http://moinejf.free.fr/