[PATCH 2/6] clk: sunxi-ng: set the parent rate when adjustin CPUX clock on A33

[Maxime Ripard]

On Wed, Dec 14, 2016 at 04:54:14AM +0800, Icenowy Zheng wrote:
> 
> 
> 13.12.2016, 23:44, "Maxime Ripard" <maxime.ripard at free-electrons.com>:
> > On Tue, Dec 13, 2016 at 11:22:48PM +0800, Icenowy Zheng wrote:
> >>  The CPUX clock on A33, which is for the Cortex-A7 cores, is designed to
> >>  be changeable by changing the rate of PLL_CPUX.
> >>
> >>  Add CLK_SET_RATE_PARENT flag to this clock.
> >>
> >>  Signed-off-by: Icenowy Zheng <icenowy at aosc.xyz>
> >
> > Acked-by: Maxime Ripard <maxime.ripard at free-electrons.com>
> 
> Excuse me, have you merged this patch?

Yes, sorry, that's what I meant :)

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 801 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20161214/f4ba7e80/attachment.sig>