[PATCH 2/6] clk: sunxi-ng: set the parent rate when adjustin CPUX clock on A33

Icenowy Zheng icenowy at aosc.xyz
Tue Dec 13 12:54:14 PST 2016



13.12.2016, 23:44, "Maxime Ripard" <maxime.ripard at free-electrons.com>:
> On Tue, Dec 13, 2016 at 11:22:48PM +0800, Icenowy Zheng wrote:
>>  The CPUX clock on A33, which is for the Cortex-A7 cores, is designed to
>>  be changeable by changing the rate of PLL_CPUX.
>>
>>  Add CLK_SET_RATE_PARENT flag to this clock.
>>
>>  Signed-off-by: Icenowy Zheng <icenowy at aosc.xyz>
>
> Acked-by: Maxime Ripard <maxime.ripard at free-electrons.com>

Excuse me, have you merged this patch?

If merged, I won't contain it in my PATCH v2, thus the PATCH v2 will contain
only an updated OPP patch.

>
> Thanks!
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com



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