[PATCH 2/2] ARM64: zynqmp: Correct the watchdog timer interrupt number

[Michal Simek]

On 9.8.2016 15:38, Michal Simek wrote:
> From: Punnaiah Choudary Kalluri <punnaiah.choudary.kalluri at xilinx.com>
> 
> Corrected the watchdog timer interrupt number.
> Origin value was for CSUPMU watchdog.
> 
> Signed-off-by: Punnaiah Choudary Kalluri <punnaia at xilinx.com>
> Signed-off-by: Michal Simek <michal.simek at xilinx.com>
> ---
> 
>  arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 8ed4f42e781b..3bae4b2675d9 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -369,7 +369,7 @@
>  			compatible = "cdns,wdt-r1p2";
>  			status = "disabled";
>  			interrupt-parent = <&gic>;
> -			interrupts = <0 52 1>;
> +			interrupts = <0 113 1>;
>  			reg = <0x0 0xfd4d0000 0x0 0x1000>;
>  			timeout-sec = <10>;
>  		};
> 

Applied both.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs


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