[PATCH 2/2] pci: host: new driver for Marvell Armada 7K/8K PCIe controller
Thomas Petazzoni
thomas.petazzoni at free-electrons.com
Thu Apr 14 07:25:28 PDT 2016
Hello,
On Mon, 11 Apr 2016 17:56:51 +0200, Thomas Petazzoni wrote:
> > > + struct pcie_port *pp = arg;
> > > + struct armada8k_pcie *pcie = to_armada8k_pcie(pp);
> > > + void __iomem *base = pcie->base;
> > > + u32 val;
> > > +
> > > + val = readl(base + PCIE_GLOBAL_INT_CAUSE1_REG);
> > > + writel(val, base + PCIE_GLOBAL_INT_CAUSE1_REG);
> > > +
> > > + return IRQ_HANDLED;
> >
> > Maybe a comment as to why you are just throwing them away.
>
> I'll have a look into this.
Enabling the INT A-D interrupts is needed for the PCI device drivers to
receive interrupts from their respective PCI devices. But then, once
you enable the INT A-D interrupts, they are also latched into the PCIe
controller, so if you don't acknowledge them in the PCIe controller
level, at the first interrupt coming from a PCI device, the system
hangs. I've added a comment in the driver about this.
> Is this needed? The clocks are registered in of_clk_init(), i.e at
> time_init() time. This is way before the device drivers get probed, no?
The clock drivers are now regular platform drivers, so I'll add the
EPROBE_DEFER handling logic.
Thanks!
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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