[PATCH v2 02/20] documentation: Clarify failed cmpxchg memory ordering semantics

[Peter Zijlstra]

On Mon, Jul 27, 2015 at 12:58:22PM +0100, Will Deacon wrote:
> On Fri, Jul 24, 2015 at 11:41:53AM +0100, Will Deacon wrote:
> > A failed cmpxchg does not provide any memory ordering guarantees, a
> > property that is used to optimise the cmpxchg implementations on Alpha,
> > PowerPC and arm64.
> > 
> > This patch updates atomic_ops.txt and memory-barriers.txt to reflect
> > this.
> > 
> > Cc: Peter Zijlstra <peterz at infradead.org>
> > Signed-off-by: Will Deacon <will.deacon at arm.com>
> > ---
> >  Documentation/atomic_ops.txt      | 4 +++-
> >  Documentation/memory-barriers.txt | 6 +++---
> >  2 files changed, 6 insertions(+), 4 deletions(-)
> 
> Peter: are you ok with me taking this via the arm64 tree (along with the
> rest of the series), or would you prefer this patch routed through -tip?

So I have this one queued, and typically these changes go through tip
because the RCU tree also ends up there, and Paul is the typical source
of patches there.

So to minimize collisions on memory-barriers.txt i'd like to keep it if
its not too much hassle.