[PATCH] spi: imx: fix ecspi mode setup

Andrew Kuksov qxovxp at gmail.com
Tue Jul 14 09:06:36 PDT 2015

>> Fixed problem with setting spi mode 0 or 1 after setting mode 2 or 3
> What is the problem and how does this change fix it (this information
> should be in the changelog)?

SPI_MODE_0 and SPI_MODE_1 requires clock low when inactive. SPI_MODE_2
and SPI_MODE_3 requires clk high when inactive.
Currently driver can just set bits in fields SCLK_PHA (SPI Clock/Data
Phase Control), SCLK_POL (SPI Clock Polarity Control),
SCLK_CTL (controls the inactive state of SCLK) ans SS_POL (SPI SS
Polarity Select) of ECSPIx_CONFIGREG register.
This patch allows driver to clear corresponding bits in these fields.

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