[PATCH v2 1/4] clk: mediatek: mt8173: Fix enabling of critical clocks

[James Liao]

Hi Daniel,

On Wed, 2015-07-01 at 22:21 +0800, Daniel Kurtz wrote:
> To be precise, it is the CLK_TOP clocks that have CLK_APMIXED PLLs as
> their parents, so we cannot enable the CLK_TOP critical clocks until
> the CLK_APMIXED clocks have all been registered.
> 
> Please add something like the above to the commit message.

OK. I'll add them.

> 
> >
> > +static struct clk_onecell_data *mt8173_top_clk_data;
> > +static struct clk_onecell_data *mt8173_pll_clk_data;
> 
> These globals can be:
> __initdata
> 
> > +
> > +static void mtk_clk_enable_critical(void)
> 
> And this function is:
> 
> static void __init

I'll add them in next patch.


Best regards,

James