[PATCH v6 1/6] PCI: designware: move calculation of bus addresses to DRA7xx

[Pratyush Anand]

On Fri, Aug 7, 2015 at 11:34 AM, Zhou Wang <wangzhou1 at hisilicon.com> wrote:
> [+cc jingoohan1 at gmail.com]
>
> On 2015/8/6 16:09, Zhou Wang wrote:
>> From: gabriele paoloni <gabriele.paoloni at huawei.com>
>>
>> Commit f4c55c5a3f7f "PCI: designware: Program ATU with untranslated
>> address" added the calculation of PCI BUS addresses in designware,
>> storing them in new fields added in "struct pcie_port". This
>> calculation is done for every designware user even if is only
>> applicable to DRA7xx.
>> This patch moves the calculation of the bus addresses to the DRA7xx
>> driver and is needed to allow the rework of designware to use
>> the new DT parsing API.
>>
>> Signed-off-by: Gabriele Paoloni <gabriele.paoloni at huawei.com>
>> Signed-off-by: Zhou Wang <wangzhou1 at hisilicon.com>


Looks fine to me
Acked-by: Pratyush Anand <pratyush.anand at gmail.com>