Re: [PATCH 2/9] ARM: dts: i.MX51: Add a second usbphy.
Alexander Shiyan
shc_work at mail.ru
Mon Mar 10 00:51:00 EDT 2014
Понедельник, 10 марта 2014, 8:52 +08:00 от Peter Chen <peter.chen at freescale.com>:
> On Fri, Mar 07, 2014 at 06:04:16PM +0100, Denis Carikli wrote:
> > Signed-off-by: Denis Carikli <denis at eukrea.com>
> > ---
> > arch/arm/boot/dts/imx51.dtsi | 8 ++++++++
> > 1 file changed, 8 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
> > index e508e6f..917b6ed 100644
> > --- a/arch/arm/boot/dts/imx51.dtsi
> > +++ b/arch/arm/boot/dts/imx51.dtsi
> > @@ -100,6 +100,13 @@
> > clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
> > clock-names = "main_clk";
> > };
> > +
> > + usbphy1: usbphy at 1 {
> > + compatible = "usb-nop-xceiv";
> > + reg = <1>;
> > + clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
> > + clock-names = "main_clk";
> > + };
>
> Is this the ulpi phy for host1 controller? Why the clock is the same with utmi phy
> clock for otg controller.
As far as I know, for i.MX51 this is as it should be.
However, I doubt the usefulness of forcing "fsl,usbphy = <&usbphy1>" below.
> > soc {
> > @@ -239,6 +246,7 @@
> > interrupts = <14>;
> > clocks = <&clks IMX5_CLK_USBOH3_GATE>;
> > fsl,usbmisc = <&usbmisc 1>;
> > + fsl,usbphy = <&usbphy1>;
> > status = "disabled";
> > };
---
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