[PATCH v1 0/4] Fine tune USB 3.0 PHY on exynos5420
gautam.vivek at samsung.com
Fri Jun 6 05:12:11 PDT 2014
The RFC version of this series was posted long time back, around December
last year .
This series is based on Heikki's patches for simpliefied phy lookup table:
[PATCHv2 0/6] phy: simplified phy lookup , applied against 'usb-next'
branch of Greg's usb tree.
Tested on peach-pit boards with SuperSpeed devices and confirmed that now
the devices are detected as SupedSpeed, not as HighSpeed.
Explanation for the need of this patch-series:
"The DWC3-exynos eXtensible host controller present on Exynos5420
SoC is quirky. The PHY serving this controller operates at High-Speed
by default, so it detects even Super-speed devices as high-speed ones.
Certain PHY parameters like Tx LOS levels and Boost levels need to be
calibrated further post initialization of xHCI controller, to get
SuperSpeed operations working."
Vivek Gautam (4):
phy: Add provision for calibrating phy.
usb: host: xhci-plat: Add support to get PHYs
usb: host: xhci-plat: Caibrate PHY post host reset
phy: exynos5-usbdrd: Calibrate LOS levels for exynos5420/5800
drivers/phy/phy-core.c | 36 ++++++++
drivers/phy/phy-exynos5-usbdrd.c | 168 ++++++++++++++++++++++++++++++++++++++
drivers/usb/host/xhci-plat.c | 74 ++++++++++++++++-
drivers/usb/host/xhci.h | 3 +
include/linux/phy/phy.h | 7 ++
5 files changed, 286 insertions(+), 2 deletions(-)
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