iMX6Q FEC: transmit queue 0 timed out

[Holger Schurig]

Hi Andy,

thank you very much, I guess that this will lead me into the right
direction. It actually made me understand what SION does, the RM
wasn't too enlighting to me.

The thing seems to be that the FEC can produce the 50 MHz reference
clock ... or it can get the reference clock from outside. The same is
true for the LAN8720AI phy: can can produce the refclock (when it has
a 25 MHz quartz, which is the case in my board), or it can consume it
from outside. While in barebox (I'm not using u-boot), the PHY makes
the 50 MHz refclk by itself, because GPR1[21] is not set and it works.

The PHY can be controlled if he creates or consume the REF CLK with
the signal on it's pin nINTSEL during the low->high transition of the
reset. I guess that whoever toggles this (i must dig into it, but the
reset pin is described in the device tree) doesn't care (or can't
care) how nINTSEL is set and so in Linux mode the modes of the two
devices don't harmonize.

Next week I've again time for this issue, I'll report back.