[PATCH v2 0/3] ARM: sun7i: irqchip: Irqchip driver for NMI

[Carlo Caione]

On Mon, Jan 6, 2014 at 6:41 PM, Carlo Caione <carlo.caione at gmail.com> wrote:
> Allwinner A20 SoCs have a special interrupt controller for managing NMI.
> Three register are present to (un)mask, control and acknowledge NMI.
> These two patches add a new irqchip driver in cascade with GIC.
>
> Changes since v1:
>         - added binding document

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