[PATCH] ARM: i.MX6: clk: Remove usbphy clock hacks

[Sascha Hauer]

On Fri, Feb 28, 2014 at 08:40:51AM +0800, Peter Chen wrote:
> On Thu, Feb 27, 2014 at 03:47:45PM +0100, Sascha Hauer wrote:
> > >  		portsc = PORTSC_PTS(PTS_UTMI) | PORTSC_PTW;
> > >  		lpm = DEVLC_PTS(PTS_UTMI) | DEVLC_PTW;
> > >  		break;
> > >  	case USBPHY_INTERFACE_MODE_ULPI:
> > >  		portsc = PORTSC_PTS(PTS_ULPI);
> > >  		lpm = DEVLC_PTS(PTS_ULPI);
> > > +		ret = usb_phy_init(ci->transceiver);
> > > +		if (ret)
> > > +			return ret;
> > >  		break;
> > >  	case USBPHY_INTERFACE_MODE_SERIAL:
> > >  		portsc = PORTSC_PTS(PTS_SERIAL);
> > >  		lpm = DEVLC_PTS(PTS_SERIAL);
> > >  		sts = 1;
> > > +		ret = usb_phy_init(ci->transceiver);
> > > +		if (ret)
> > > +			return ret;
> > >  		break;
> > >  	case USBPHY_INTERFACE_MODE_HSIC:
> > > +		ret = usb_phy_init(ci->transceiver);
> > > +		if (ret)
> > > +			return ret;
> > >  		portsc = PORTSC_PTS(PTS_HSIC);
> > >  		lpm = DEVLC_PTS(PTS_HSIC);
> > 
> > It seems you try to adjust the order in which PORTSC is configured and
> > the phy is initialized. Instead of ordering the phy setup and register
> > writes you just reorder some variable initializations.
> > 
> > We discussed this back and forth here and think that the phy clock
> > should be enabled/disabled via runtime pm ops as needed by the chipidea
> > driver. Hacking the init order depending on the phy type like you did above
> > doesn't sound like a good plan.
> > 
> 
> The portsc.pts is only need to be set only time, at initialization routine,
> the same for phy init.
> 
> After init finishes, we can control phy clock by runtime pm, it was what
> I did for PM patchset for chipidea driver.

I'm talking about runtime pm for the phy, not for the chipidea driver.

Sascha

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