[PATCH 17/18] KVM: ARM: vgic: add the GICv3 backend
Will Deacon
will.deacon at arm.com
Tue Feb 25 13:07:56 EST 2014
On Wed, Feb 05, 2014 at 01:30:49PM +0000, Marc Zyngier wrote:
> Introduce the support code for emulating a GICv2 on top of GICv3
> hardware.
>
> Acked-by: Catalin Marinas <catalin.marinas at arm.com>
> Signed-off-by: Marc Zyngier <marc.zyngier at arm.com>
> ---
> include/kvm/arm_vgic.h | 26 ++++++
> virt/kvm/arm/vgic-v3.c | 220 +++++++++++++++++++++++++++++++++++++++++++++++++
> virt/kvm/arm/vgic.c | 2 +
> 3 files changed, 248 insertions(+)
> create mode 100644 virt/kvm/arm/vgic-v3.c
>
> diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h
> index c95039a..caeb8f4 100644
> --- a/include/kvm/arm_vgic.h
> +++ b/include/kvm/arm_vgic.h
> @@ -32,6 +32,7 @@
> #define VGIC_NR_SHARED_IRQS (VGIC_NR_IRQS - VGIC_NR_PRIVATE_IRQS)
> #define VGIC_MAX_CPUS KVM_MAX_VCPUS
> #define VGIC_MAX_LRS (1 << 6)
> +#define VGIC_V3_MAX_LRS 16
Since we have fewer list registers, doesn't the code in vgic.c need updating
to honour the relevant bounds? (e.g. the use of find_first_zero_bit in
vgic_queue_irq).
Will
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