[RFC PATCH] ARM: OMAP2+: clockdomain: Reintroduce SW_SLEEP Support (fwd)

[Vaibhav Bedia]

On Wed, Feb 19, 2014 at 1:25 PM, Paul Walmsley <paul at pwsan.com> wrote:
>
> Just FYI.  Queued for v3.15 unless someone complains.
>

No complains but i wanted to point out that with some additional
changes it's possible
to consolidate AM335x (and AM437x) very nicely with the rest of OMAP4+
PRM/CM code.

I had posted a series (which had a similar patch) a while back [1] but
that got never
got any feedback :/

If one looks hard enough AM335x/AM437x/TI81xx are not that different
from OMAP4+ :)

Regards,
Vaibhav

[1] http://comments.gmane.org/gmane.linux.ports.arm.omap/100474

> - Paul
>
> ---------- Forwarded message ----------
> Date: Fri, 7 Feb 2014 16:20:59 -0600
> From: Dave Gerlach <d-gerlach at ti.com>
> To: linux-omap at vger.kernel.org
> Cc: Tony Lindgren <tony at atomide.com>, Paul Walmsley <paul at pwsan.com>,
>     Rajendra Nayak <rnayak at ti.com>, Nishanth Menon <nm at ti.com>,
>     Dave Gerlach <d-gerlach at ti.com>
> Subject: [RFC PATCH] ARM: OMAP2+: clockdomain: Reintroduce SW_SLEEP Support
>
> Since commit 65aa94b204d (ARM: OMAP4: clockdomain/CM code: Update supported
> transition modes), on OMAP4, all CLKDMs support HW_AUTO so this is used
> instead of SW_SLEEP for the idling of clockdomains. However, additional
> SoCs now leverage the OMAP4 clockdomain code so update it to use SW_SLEEP
> if the clockdomain data specifies that the CLKDM has the
> CLKDM_CAN_FORCE_SLEEP flag set rather than using HW_AUTO for both cases.
>
> Signed-off-by: Dave Gerlach <d-gerlach at ti.com>
> ---
>  arch/arm/mach-omap2/cminst44xx.c |   18 ++++++++++++++++--
>  1 file changed, 16 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
> index 731ca13..f5c4731 100644
> --- a/arch/arm/mach-omap2/cminst44xx.c
> +++ b/arch/arm/mach-omap2/cminst44xx.c
> @@ -254,6 +254,11 @@ void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs)
>   *
>   */
>
> +void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs)
> +{
> +       _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, part, inst, cdoffs);
> +}
> +
>  /**
>   * omap4_cminst_wait_module_ready - wait for a module to be in 'func' state
>   * @part: PRCM partition ID that the CM_CLKCTRL register exists in
> @@ -404,8 +409,17 @@ static int omap4_clkdm_clear_all_wkup_sleep_deps(struct clockdomain *clkdm)
>
>  static int omap4_clkdm_sleep(struct clockdomain *clkdm)
>  {
> -       omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition,
> -                                       clkdm->cm_inst, clkdm->clkdm_offs);
> +       if (clkdm->flags & CLKDM_CAN_HWSUP)
> +               omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition,
> +                                               clkdm->cm_inst,
> +                                               clkdm->clkdm_offs);
> +       else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)
> +               omap4_cminst_clkdm_force_sleep(clkdm->prcm_partition,
> +                                              clkdm->cm_inst,
> +                                              clkdm->clkdm_offs);
> +       else
> +               return -EINVAL;
> +
>         return 0;
>  }
>
> --
> 1.7.9.5
>
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